timebase.h (d0034a7a4ac7fae708146ac0059b9c47a1543f0d) timebase.h (688de017efaab8a7764ab2c05ce7128d0361023b)
1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Common timebase prototypes and such for all ppc machines.
4 */
5
6#ifndef _ASM_POWERPC_VDSO_TIMEBASE_H
7#define _ASM_POWERPC_VDSO_TIMEBASE_H
8
9#include <asm/reg.h>
10
11/*
12 * We use __powerpc64__ here because we want the compat VDSO to use the 32-bit
13 * version below in the else case of the ifdef.
14 */
1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Common timebase prototypes and such for all ppc machines.
4 */
5
6#ifndef _ASM_POWERPC_VDSO_TIMEBASE_H
7#define _ASM_POWERPC_VDSO_TIMEBASE_H
8
9#include <asm/reg.h>
10
11/*
12 * We use __powerpc64__ here because we want the compat VDSO to use the 32-bit
13 * version below in the else case of the ifdef.
14 */
15#if defined(__powerpc64__) && (defined(CONFIG_PPC_CELL) || defined(CONFIG_E500))
15#if defined(__powerpc64__) && (defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_E500))
16#define mftb() ({unsigned long rval; \
17 asm volatile( \
18 "90: mfspr %0, %2;\n" \
19 ASM_FTR_IFSET( \
20 "97: cmpwi %0,0;\n" \
21 " beq- 90b;\n", "", %1) \
22 : "=r" (rval) \
23 : "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \

--- 50 unchanged lines hidden --- 		16#define mftb() ({unsigned long rval; \
17 asm volatile( \
18 "90: mfspr %0, %2;\n" \
19 ASM_FTR_IFSET( \
20 "97: cmpwi %0,0;\n" \
21 " beq- 90b;\n", "", %1) \
22 : "=r" (rval) \
23 : "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \

--- 50 unchanged lines hidden ---