| reg.h (d5b798c15fb97136dc13ac5a9629f91e88d5d565) | reg.h (9b256714979fad61ae11d90b53cf67dd5e6484eb) |
|---|---|
| 1/* 2 * Contains the definition of registers common to all PowerPC variants. 3 * If a register definition has been changed in a different PowerPC 4 * variant, we will case it in #ifndef XXX ... #endif, and have the 5 * number used in the Programming Environments Manual For 32-Bit 6 * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. 7 */ 8 --- 260 unchanged lines hidden (view full) --- 269#define DABRX_HYP __MASK(2) 270#define DABRX_BTI __MASK(3) 271#define DABRX_ALL (DABRX_BTI | DABRX_HYP | DABRX_KERNEL | DABRX_USER) 272#define SPRN_DAR 0x013 /* Data Address Register */ 273#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ 274#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ 275#define DSISR_NOHPTE 0x40000000 /* no translation found */ 276#define DSISR_PROTFAULT 0x08000000 /* protection fault */ | 1/* 2 * Contains the definition of registers common to all PowerPC variants. 3 * If a register definition has been changed in a different PowerPC 4 * variant, we will case it in #ifndef XXX ... #endif, and have the 5 * number used in the Programming Environments Manual For 32-Bit 6 * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. 7 */ 8 --- 260 unchanged lines hidden (view full) --- 269#define DABRX_HYP __MASK(2) 270#define DABRX_BTI __MASK(3) 271#define DABRX_ALL (DABRX_BTI | DABRX_HYP | DABRX_KERNEL | DABRX_USER) 272#define SPRN_DAR 0x013 /* Data Address Register */ 273#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ 274#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ 275#define DSISR_NOHPTE 0x40000000 /* no translation found */ 276#define DSISR_PROTFAULT 0x08000000 /* protection fault */ |
| 277#define DSISR_BADACCESS 0x04000000 /* bad access to CI or G */ | |
| 278#define DSISR_ISSTORE 0x02000000 /* access was a store */ 279#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ 280#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */ 281#define DSISR_KEYFAULT 0x00200000 /* Key fault */ | 277#define DSISR_ISSTORE 0x02000000 /* access was a store */ 278#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ 279#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */ 280#define DSISR_KEYFAULT 0x00200000 /* Key fault */ |
| 282#define DSISR_UNSUPP_MMU 0x00080000 /* Unsupported MMU config */ 283#define DSISR_SET_RC 0x00040000 /* Failed setting of R/C bits */ 284#define DSISR_PGDIRFAULT 0x00020000 /* Fault on page directory */ | |
| 285#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ 286#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ 287#define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */ 288#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ 289#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ 290#define SPRN_TBU40 0x11E /* Timebase upper 40 bits (hyper, R/W) */ 291#define SPRN_SPURR 0x134 /* Scaled PURR */ 292#define SPRN_HSPRG0 0x130 /* Hypervisor Scratch 0 */ --- 355 unchanged lines hidden (view full) --- 648#define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */ 649#define SPRN_USPRG7 0x107 /* SPRG7 userspace read */ 650#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */ 651#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */ 652#define SRR1_ISI_NOPT 0x40000000 /* ISI: Not found in hash */ 653#define SRR1_ISI_N_OR_G 0x10000000 /* ISI: Access is no-exec or G */ 654#define SRR1_ISI_PROT 0x08000000 /* ISI: Other protection fault */ 655#define SRR1_WAKEMASK 0x00380000 /* reason for wakeup */ | 281#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ 282#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ 283#define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */ 284#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ 285#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ 286#define SPRN_TBU40 0x11E /* Timebase upper 40 bits (hyper, R/W) */ 287#define SPRN_SPURR 0x134 /* Scaled PURR */ 288#define SPRN_HSPRG0 0x130 /* Hypervisor Scratch 0 */ --- 355 unchanged lines hidden (view full) --- 644#define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */ 645#define SPRN_USPRG7 0x107 /* SPRG7 userspace read */ 646#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */ 647#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */ 648#define SRR1_ISI_NOPT 0x40000000 /* ISI: Not found in hash */ 649#define SRR1_ISI_N_OR_G 0x10000000 /* ISI: Access is no-exec or G */ 650#define SRR1_ISI_PROT 0x08000000 /* ISI: Other protection fault */ 651#define SRR1_WAKEMASK 0x00380000 /* reason for wakeup */ |
| 656#define SRR1_WAKEMASK_P8 0x003c0000 /* reason for wakeup on POWER8 */ | 652#define SRR1_WAKEMASK_P8 0x003c0000 /* reason for wakeup on POWER8 and 9 */ |
| 657#define SRR1_WAKESYSERR 0x00300000 /* System error */ 658#define SRR1_WAKEEE 0x00200000 /* External interrupt */ | 653#define SRR1_WAKESYSERR 0x00300000 /* System error */ 654#define SRR1_WAKEEE 0x00200000 /* External interrupt */ |
| 655#define SRR1_WAKEHVI 0x00240000 /* Hypervisor Virtualization Interrupt (P9) */ |
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| 659#define SRR1_WAKEMT 0x00280000 /* mtctrl */ 660#define SRR1_WAKEHMI 0x00280000 /* Hypervisor maintenance */ 661#define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */ 662#define SRR1_WAKEDBELL 0x00140000 /* Privileged doorbell on P8 */ 663#define SRR1_WAKETHERM 0x00100000 /* Thermal management interrupt */ 664#define SRR1_WAKERESET 0x00100000 /* System reset */ 665#define SRR1_WAKEHDBELL 0x000c0000 /* Hypervisor doorbell on P8 */ 666#define SRR1_WAKESTATE 0x00030000 /* Powersave exit mask [46:47] */ --- 689 unchanged lines hidden --- | 656#define SRR1_WAKEMT 0x00280000 /* mtctrl */ 657#define SRR1_WAKEHMI 0x00280000 /* Hypervisor maintenance */ 658#define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */ 659#define SRR1_WAKEDBELL 0x00140000 /* Privileged doorbell on P8 */ 660#define SRR1_WAKETHERM 0x00100000 /* Thermal management interrupt */ 661#define SRR1_WAKERESET 0x00100000 /* System reset */ 662#define SRR1_WAKEHDBELL 0x000c0000 /* Hypervisor doorbell on P8 */ 663#define SRR1_WAKESTATE 0x00030000 /* Powersave exit mask [46:47] */ --- 689 unchanged lines hidden --- |