| reg.h (c900529f3d9161bfde5cca0754f83b4d3c3e0220) | reg.h (8631837dbf8bc29546685ccc2f9dcef8aea9a4da) |
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| 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Contains the definition of registers common to all PowerPC variants. 4 * If a register definition has been changed in a different PowerPC 5 * variant, we will case it in #ifndef XXX ... #endif, and have the 6 * number used in the Programming Environments Manual For 32-Bit 7 * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. 8 */ --- 603 unchanged lines hidden (view full) --- 612#define HID1_PC2 (1<<14) /* 7450 PLL_CFG[2] */ 613#define HID1_PC3 (1<<13) /* 7450 PLL_CFG[3] */ 614#define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */ 615#define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ 616#define HID1_PS (1<<16) /* 750FX PLL selection */ 617#endif 618#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ 619#define SPRN_HID2_GEKKO 0x398 /* Gekko HID2 Register */ | 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Contains the definition of registers common to all PowerPC variants. 4 * If a register definition has been changed in a different PowerPC 5 * variant, we will case it in #ifndef XXX ... #endif, and have the 6 * number used in the Programming Environments Manual For 32-Bit 7 * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. 8 */ --- 603 unchanged lines hidden (view full) --- 612#define HID1_PC2 (1<<14) /* 7450 PLL_CFG[2] */ 613#define HID1_PC3 (1<<13) /* 7450 PLL_CFG[3] */ 614#define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */ 615#define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ 616#define HID1_PS (1<<16) /* 750FX PLL selection */ 617#endif 618#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ 619#define SPRN_HID2_GEKKO 0x398 /* Gekko HID2 Register */ |
| 620#define SPRN_HID2_G2_LE 0x3F3 /* G2_LE HID2 Register */ 621#define HID2_G2_LE_HBE (1<<18) /* High BAT Enable (G2_LE) */ |
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| 620#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ 621#define SPRN_IABR2 0x3FA /* 83xx */ 622#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */ 623#define SPRN_IAMR 0x03D /* Instr. Authority Mask Reg */ 624#define SPRN_HID4 0x3F4 /* 970 HID4 */ 625#define HID4_LPES0 (1ul << (63-0)) /* LPAR env. sel. bit 0 */ 626#define HID4_RMLS2_SH (63 - 2) /* Real mode limit bottom 2 bits */ 627#define HID4_LPID5_SH (63 - 6) /* partition ID bottom 4 bits */ --- 846 unchanged lines hidden --- | 622#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ 623#define SPRN_IABR2 0x3FA /* 83xx */ 624#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */ 625#define SPRN_IAMR 0x03D /* Instr. Authority Mask Reg */ 626#define SPRN_HID4 0x3F4 /* 970 HID4 */ 627#define HID4_LPES0 (1ul << (63-0)) /* LPAR env. sel. bit 0 */ 628#define HID4_RMLS2_SH (63 - 2) /* Real mode limit bottom 2 bits */ 629#define HID4_LPID5_SH (63 - 6) /* partition ID bottom 4 bits */ --- 846 unchanged lines hidden --- |