pci.h (e6aa0f07cb5e81a7cbeaf3be6e2101234c2f0d30) pci.h (4fc665b88a79a45bae8bbf3a05563c27c7337c3d)
1#ifndef __ASM_POWERPC_PCI_H
2#define __ASM_POWERPC_PCI_H
3#ifdef __KERNEL__
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version

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55#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
56static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
57{
58 if (ppc_md.pci_get_legacy_ide_irq)
59 return ppc_md.pci_get_legacy_ide_irq(dev, channel);
60 return channel ? 15 : 14;
61}
62
1#ifndef __ASM_POWERPC_PCI_H
2#define __ASM_POWERPC_PCI_H
3#ifdef __KERNEL__
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version

--- 46 unchanged lines hidden (view full) ---

55#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
56static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
57{
58 if (ppc_md.pci_get_legacy_ide_irq)
59 return ppc_md.pci_get_legacy_ide_irq(dev, channel);
60 return channel ? 15 : 14;
61}
62
63#ifdef CONFIG_PCI
64extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
65extern struct dma_mapping_ops *get_pci_dma_ops(void);
66#else /* CONFIG_PCI */
67#define set_pci_dma_ops(d)
68#define get_pci_dma_ops() NULL
69#endif
70
63#ifdef CONFIG_PPC64
64
65/*
66 * We want to avoid touching the cacheline size or MWI bit.
67 * pSeries firmware sets the cacheline size (which is not the cpu cacheline
68 * size in all cases) and hardware treats MWI the same as memory write.
69 */
70#define PCI_DISABLE_MWI
71
72#ifdef CONFIG_PCI
71#ifdef CONFIG_PPC64
72
73/*
74 * We want to avoid touching the cacheline size or MWI bit.
75 * pSeries firmware sets the cacheline size (which is not the cpu cacheline
76 * size in all cases) and hardware treats MWI the same as memory write.
77 */
78#define PCI_DISABLE_MWI
79
80#ifdef CONFIG_PCI
73extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
74extern struct dma_mapping_ops *get_pci_dma_ops(void);
75
76static inline void pci_dma_burst_advice(struct pci_dev *pdev,
77 enum pci_dma_burst_strategy *strat,
78 unsigned long *strategy_parameter)
79{
80 unsigned long cacheline_size;
81 u8 byte;
82
83 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
84 if (byte == 0)
85 cacheline_size = 1024;
86 else
87 cacheline_size = (int) byte * 4;
88
89 *strat = PCI_DMA_BURST_MULTIPLE;
90 *strategy_parameter = cacheline_size;
91}
81static inline void pci_dma_burst_advice(struct pci_dev *pdev,
82 enum pci_dma_burst_strategy *strat,
83 unsigned long *strategy_parameter)
84{
85 unsigned long cacheline_size;
86 u8 byte;
87
88 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
89 if (byte == 0)
90 cacheline_size = 1024;
91 else
92 cacheline_size = (int) byte * 4;
93
94 *strat = PCI_DMA_BURST_MULTIPLE;
95 *strategy_parameter = cacheline_size;
96}
92#else /* CONFIG_PCI */
93#define set_pci_dma_ops(d)
94#define get_pci_dma_ops() NULL
95#endif
96
97#else /* 32-bit */
98
99#ifdef CONFIG_PCI
100static inline void pci_dma_burst_advice(struct pci_dev *pdev,
101 enum pci_dma_burst_strategy *strat,
102 unsigned long *strategy_parameter)

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98
99#else /* 32-bit */
100
101#ifdef CONFIG_PCI
102static inline void pci_dma_burst_advice(struct pci_dev *pdev,
103 enum pci_dma_burst_strategy *strat,
104 unsigned long *strategy_parameter)

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