mmu.h (7a9787e1eba95a166265e6a260cf30af04ef0a99) mmu.h (7c03d653cd257793dc40520c94e229b5fd0578e7)
1#ifndef _ASM_POWERPC_MMU_H_
2#define _ASM_POWERPC_MMU_H_
3#ifdef __KERNEL__
4
1#ifndef _ASM_POWERPC_MMU_H_
2#define _ASM_POWERPC_MMU_H_
3#ifdef __KERNEL__
4
5#include <asm/asm-compat.h>
6#include <asm/feature-fixups.h>
7
8/*
9 * MMU features bit definitions
10 */
11
12/*
13 * First half is MMU families
14 */
15#define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
16#define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
17#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
18#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
19#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
20
21/*
22 * This is individual features
23 */
24
25/* Enable use of high BAT registers */
26#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
27
28/* Enable >32-bit physical addresses on 32-bit processor, only used
29 * by CONFIG_6xx currently as BookE supports that from day 1
30 */
31#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
32
33#ifndef __ASSEMBLY__
34#include <asm/cputable.h>
35
36static inline int mmu_has_feature(unsigned long feature)
37{
38 return (cur_cpu_spec->mmu_features & feature);
39}
40
41extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
42
43#endif /* !__ASSEMBLY__ */
44
45
5#ifdef CONFIG_PPC64
6/* 64-bit classic hash table MMU */
7# include <asm/mmu-hash64.h>
8#elif defined(CONFIG_PPC_STD_MMU)
9/* 32-bit classic hash table MMU */
10# include <asm/mmu-hash32.h>
11#elif defined(CONFIG_40x)
12/* 40x-style software loaded TLB */

--- 14 unchanged lines hidden --- 		46#ifdef CONFIG_PPC64
47/* 64-bit classic hash table MMU */
48# include <asm/mmu-hash64.h>
49#elif defined(CONFIG_PPC_STD_MMU)
50/* 32-bit classic hash table MMU */
51# include <asm/mmu-hash32.h>
52#elif defined(CONFIG_40x)
53/* 40x-style software loaded TLB */

--- 14 unchanged lines hidden ---