cputhreads.h (cbecf716ca618fd44feda6bd9a64a8179d031fc5) cputhreads.h (77bbbc0cf84834ed130838f7ac1988567f4d0288)
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_CPUTHREADS_H
3#define _ASM_POWERPC_CPUTHREADS_H
4
5#ifndef __ASSEMBLY__
6#include <linux/cpumask.h>
7#include <asm/cpu_has_feature.h>
8

--- 84 unchanged lines hidden (view full) ---

93 return cpu & ~(threads_per_core - 1);
94}
95
96static inline int cpu_last_thread_sibling(int cpu)
97{
98 return cpu | (threads_per_core - 1);
99}
100
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_CPUTHREADS_H
3#define _ASM_POWERPC_CPUTHREADS_H
4
5#ifndef __ASSEMBLY__
6#include <linux/cpumask.h>
7#include <asm/cpu_has_feature.h>
8

--- 84 unchanged lines hidden (view full) ---

93 return cpu & ~(threads_per_core - 1);
94}
95
96static inline int cpu_last_thread_sibling(int cpu)
97{
98 return cpu | (threads_per_core - 1);
99}
100
101/*
102 * tlb_thread_siblings are siblings which share a TLB. This is not
103 * architected, is not something a hypervisor could emulate and a future
104 * CPU may change behaviour even in compat mode, so this should only be
105 * used on PowerNV, and only with care.
106 */
107static inline int cpu_first_tlb_thread_sibling(int cpu)
108{
109 if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
110 return cpu & ~0x6; /* Big Core */
111 else
112 return cpu_first_thread_sibling(cpu);
113}
114
115static inline int cpu_last_tlb_thread_sibling(int cpu)
116{
117 if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
118 return cpu | 0x6; /* Big Core */
119 else
120 return cpu_last_thread_sibling(cpu);
121}
122
123static inline int cpu_tlb_thread_sibling_step(void)
124{
125 if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
126 return 2; /* Big Core */
127 else
128 return 1;
129}
130
101static inline u32 get_tensr(void)
102{
103#ifdef CONFIG_BOOKE
104 if (cpu_has_feature(CPU_FTR_SMT))
105 return mfspr(SPRN_TENSR);
106#endif
107 return 1;
108}
109
110void book3e_start_thread(int thread, unsigned long addr);
111void book3e_stop_thread(int thread);
112
113#endif /* __ASSEMBLY__ */
114
115#define INVALID_THREAD_HWID 0x0fff
116
117#endif /* _ASM_POWERPC_CPUTHREADS_H */
118
131static inline u32 get_tensr(void)
132{
133#ifdef CONFIG_BOOKE
134 if (cpu_has_feature(CPU_FTR_SMT))
135 return mfspr(SPRN_TENSR);
136#endif
137 return 1;
138}
139
140void book3e_start_thread(int thread, unsigned long addr);
141void book3e_stop_thread(int thread);
142
143#endif /* __ASSEMBLY__ */
144
145#define INVALID_THREAD_HWID 0x0fff
146
147#endif /* _ASM_POWERPC_CPUTHREADS_H */
148