| cputable.h (b65b34895437915f411882dd40d704eb0863ffb0) | cputable.h (fe04b1121511a97982a1fcdd38e44d2029304a6d) |
|---|---|
| 1#ifndef __ASM_POWERPC_CPUTABLE_H 2#define __ASM_POWERPC_CPUTABLE_H 3 4#define PPC_FEATURE_32 0x80000000 5#define PPC_FEATURE_64 0x40000000 6#define PPC_FEATURE_601_INSTR 0x20000000 7#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 8#define PPC_FEATURE_HAS_FPU 0x08000000 --- 56 unchanged lines hidden (view full) --- 65 PPC_PMC_G4 = 3, 66}; 67 68struct pt_regs; 69 70extern int machine_check_generic(struct pt_regs *regs); 71extern int machine_check_4xx(struct pt_regs *regs); 72extern int machine_check_440A(struct pt_regs *regs); | 1#ifndef __ASM_POWERPC_CPUTABLE_H 2#define __ASM_POWERPC_CPUTABLE_H 3 4#define PPC_FEATURE_32 0x80000000 5#define PPC_FEATURE_64 0x40000000 6#define PPC_FEATURE_601_INSTR 0x20000000 7#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 8#define PPC_FEATURE_HAS_FPU 0x08000000 --- 56 unchanged lines hidden (view full) --- 65 PPC_PMC_G4 = 3, 66}; 67 68struct pt_regs; 69 70extern int machine_check_generic(struct pt_regs *regs); 71extern int machine_check_4xx(struct pt_regs *regs); 72extern int machine_check_440A(struct pt_regs *regs); |
| 73extern int machine_check_e500mc(struct pt_regs *regs); |
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| 73extern int machine_check_e500(struct pt_regs *regs); 74extern int machine_check_e200(struct pt_regs *regs); | 74extern int machine_check_e500(struct pt_regs *regs); 75extern int machine_check_e200(struct pt_regs *regs); |
| 76extern int machine_check_47x(struct pt_regs *regs); |
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| 75 76/* NOTE WELL: Update identify_cpu() if fields are added or removed! */ 77struct cpu_spec { 78 /* CPU is matched via (PVR & pvr_mask) == pvr_value */ 79 unsigned int pvr_mask; 80 unsigned int pvr_value; 81 82 char *cpu_name; --- 277 unchanged lines hidden (view full) --- 360 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | \ 361 CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) 362#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_USE_TB) 363#define CPU_FTRS_8XX (CPU_FTR_USE_TB) 364#define CPU_FTRS_40X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 365#define CPU_FTRS_44X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 366#define CPU_FTRS_440x6 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \ 367 CPU_FTR_INDEXED_DCR) | 77 78/* NOTE WELL: Update identify_cpu() if fields are added or removed! */ 79struct cpu_spec { 80 /* CPU is matched via (PVR & pvr_mask) == pvr_value */ 81 unsigned int pvr_mask; 82 unsigned int pvr_value; 83 84 char *cpu_name; --- 277 unchanged lines hidden (view full) --- 362 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | \ 363 CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) 364#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_USE_TB) 365#define CPU_FTRS_8XX (CPU_FTR_USE_TB) 366#define CPU_FTRS_40X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 367#define CPU_FTRS_44X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 368#define CPU_FTRS_440x6 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \ 369 CPU_FTR_INDEXED_DCR) |
| 370#define CPU_FTRS_47X (CPU_FTRS_440x6) |
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| 368#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ 369 CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \ 370 CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE) 371#define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 372 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \ 373 CPU_FTR_NOEXECUTE) 374#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 375 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \ --- 72 unchanged lines hidden (view full) --- 448 CPU_FTRS_8XX | 449#endif 450#ifdef CONFIG_40x 451 CPU_FTRS_40X | 452#endif 453#ifdef CONFIG_44x 454 CPU_FTRS_44X | CPU_FTRS_440x6 | 455#endif | 371#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ 372 CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \ 373 CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE) 374#define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 375 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \ 376 CPU_FTR_NOEXECUTE) 377#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 378 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \ --- 72 unchanged lines hidden (view full) --- 451 CPU_FTRS_8XX | 452#endif 453#ifdef CONFIG_40x 454 CPU_FTRS_40X | 455#endif 456#ifdef CONFIG_44x 457 CPU_FTRS_44X | CPU_FTRS_440x6 | 458#endif |
| 459#ifdef CONFIG_PPC_47x 460 CPU_FTRS_47X | 461#endif |
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| 456#ifdef CONFIG_E200 457 CPU_FTRS_E200 | 458#endif 459#ifdef CONFIG_E500 460 CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC | 461#endif 462 0, 463}; --- 54 unchanged lines hidden --- | 462#ifdef CONFIG_E200 463 CPU_FTRS_E200 | 464#endif 465#ifdef CONFIG_E500 466 CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC | 467#endif 468 0, 469}; --- 54 unchanged lines hidden --- |