ppcboot.h (48a7afe314bfc4d7f50e1608632f503dbba7e013) ppcboot.h (61d3b949b70802c4f32d540b11a93128c31c67ea)
1/*
2 * This interface is used for compatibility with old U-boots *ONLY*.
3 * Please do not imitate or extend this.
4 */
5
6/*
7 * (C) Copyright 2000, 2001
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.

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73 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
74 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
75 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
76#endif
77#if defined(TARGET_HYMOD)
78 hymod_conf_t bi_hymod_conf; /* hymod configuration information */
79#endif
80#if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
1/*
2 * This interface is used for compatibility with old U-boots *ONLY*.
3 * Please do not imitate or extend this.
4 */
5
6/*
7 * (C) Copyright 2000, 2001
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.

--- 64 unchanged lines hidden (view full) ---

73 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
74 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
75 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
76#endif
77#if defined(TARGET_HYMOD)
78 hymod_conf_t bi_hymod_conf; /* hymod configuration information */
79#endif
80#if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
81 defined(TARGET_85xx) || defined(TARGET_83xx)
81 defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
82 /* second onboard ethernet port */
83 unsigned char bi_enet1addr[6];
84#define HAVE_ENET1ADDR
85#endif
82 /* second onboard ethernet port */
83 unsigned char bi_enet1addr[6];
84#define HAVE_ENET1ADDR
85#endif
86#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || defined(TARGET_85xx)
86#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
87 defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
87 /* third onboard ethernet ports */
88 unsigned char bi_enet2addr[6];
89#define HAVE_ENET2ADDR
90#endif
88 /* third onboard ethernet ports */
89 unsigned char bi_enet2addr[6];
90#define HAVE_ENET2ADDR
91#endif
91#if defined(TARGET_440GX)
92#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
92 /* fourth onboard ethernet ports */
93 unsigned char bi_enet3addr[6];
94#define HAVE_ENET3ADDR
95#endif
96#if defined(TARGET_4xx)
97 unsigned int bi_opbfreq; /* OB clock in Hz */
98 int bi_iic_fast[2]; /* Use fast i2c mode */
99#endif
100#if defined(TARGET_440GX)
101 int bi_phynum[4]; /* phy mapping */
102 int bi_phymode[4]; /* phy mode */
103#endif
104} bd_t;
105
106#define bi_tbfreq bi_intfreq
107
108#endif /* __PPCBOOT_H__ */
93 /* fourth onboard ethernet ports */
94 unsigned char bi_enet3addr[6];
95#define HAVE_ENET3ADDR
96#endif
97#if defined(TARGET_4xx)
98 unsigned int bi_opbfreq; /* OB clock in Hz */
99 int bi_iic_fast[2]; /* Use fast i2c mode */
100#endif
101#if defined(TARGET_440GX)
102 int bi_phynum[4]; /* phy mapping */
103 int bi_phymode[4]; /* phy mode */
104#endif
105} bd_t;
106
107#define bi_tbfreq bi_intfreq
108
109#endif /* __PPCBOOT_H__ */