o2d.dtsi (de65d816aa44f9ddd79861ae21d75010cc1fd003) o2d.dtsi (fa59f178552f927bd96771ba84e9706655bea705)
1/*
2 * O2D base Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "mpc5200b.dtsi"
14
1/*
2 * O2D base Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "mpc5200b.dtsi"
14
15&gpt0 {
16 gpio-controller;
17 fsl,has-wdt;
18 fsl,wdt-on-boot = <0>;
19};
20&gpt1 { gpio-controller; };
21
15/ {
16 model = "ifm,o2d";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x04000000>; // 64MB
21 };
22
23 soc5200@f0000000 {
24
22/ {
23 model = "ifm,o2d";
24 compatible = "ifm,o2d";
25
26 memory {
27 reg = <0x00000000 0x04000000>; // 64MB
28 };
29
30 soc5200@f0000000 {
31
25 gpio_simple: gpio@b00 {
26 };
27
28 timer@600 { // General Purpose Timer
29 #gpio-cells = <2>;
30 gpio-controller;
31 fsl,has-wdt;
32 fsl,wdt-on-boot = <0>;
33 };
34
35 timer@610 {
36 #gpio-cells = <2>;
37 gpio-controller;
38 };
39
40 timer7: timer@670 {
41 };
42
43 rtc@800 {
44 status = "disabled";
45 };
46
47 psc@2000 { // PSC1
48 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
49 #address-cells = <1>;
50 #size-cells = <0>;

--- 62 unchanged lines hidden (view full) ---

113 reg = <0x00040000 0x00020000>;
114 read-only;
115 };
116 };
117
118 csi@3,0 {
119 compatible = "ifm,o2d-csi";
120 reg = <3 0 0x00100000>;
32 rtc@800 {
33 status = "disabled";
34 };
35
36 psc@2000 { // PSC1
37 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
38 #address-cells = <1>;
39 #size-cells = <0>;

--- 62 unchanged lines hidden (view full) ---

102 reg = <0x00040000 0x00020000>;
103 read-only;
104 };
105 };
106
107 csi@3,0 {
108 compatible = "ifm,o2d-csi";
109 reg = <3 0 0x00100000>;
121 ifm,csi-clk-handle = <&timer7>;
110 ifm,csi-clk-handle = <&gpt7>;
122 gpios = <&gpio_simple 23 0 /* imag_capture */
123 &gpio_simple 26 0 /* imag_reset */
124 &gpio_simple 29 0>; /* imag_master_en */
125
126 interrupts = <1 1 2>; /* IRQ1, edge falling */
127
128 ifm,csi-addr-bus-width = <24>;
129 ifm,csi-data-bus-width = <8>;
130 ifm,csi-wait-cycles = <0>;
131 };
132 };
133};
111 gpios = <&gpio_simple 23 0 /* imag_capture */
112 &gpio_simple 26 0 /* imag_reset */
113 &gpio_simple 29 0>; /* imag_master_en */
114
115 interrupts = <1 1 2>; /* IRQ1, edge falling */
116
117 ifm,csi-addr-bus-width = <24>;
118 ifm,csi-data-bus-width = <8>;
119 ifm,csi-wait-cycles = <0>;
120 };
121 };
122};