charon.dts (7855b6c66dc458e2f5abfb2b50f527ea4101df77) | charon.dts (aed2886a5e9ffc8269a4220bff1e9e030d3d2eb1) |
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1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * charon board Device Tree Source 4 * 5 * Copyright (C) 2007 Semihalf 6 * Marian Balakowicz <m8@semihalf.com> 7 * 8 * Copyright (C) 2010 DENX Software Engineering GmbH --- 21 unchanged lines hidden (view full) --- 30 d-cache-size = <0x4000>; // L1, 16K 31 i-cache-size = <0x4000>; // L1, 16K 32 timebase-frequency = <0>; // from bootloader 33 bus-frequency = <0>; // from bootloader 34 clock-frequency = <0>; // from bootloader 35 }; 36 }; 37 | 1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * charon board Device Tree Source 4 * 5 * Copyright (C) 2007 Semihalf 6 * Marian Balakowicz <m8@semihalf.com> 7 * 8 * Copyright (C) 2010 DENX Software Engineering GmbH --- 21 unchanged lines hidden (view full) --- 30 d-cache-size = <0x4000>; // L1, 16K 31 i-cache-size = <0x4000>; // L1, 16K 32 timebase-frequency = <0>; // from bootloader 33 bus-frequency = <0>; // from bootloader 34 clock-frequency = <0>; // from bootloader 35 }; 36 }; 37 |
38 memory { | 38 memory@0 { |
39 device_type = "memory"; 40 reg = <0x00000000 0x08000000>; // 128MB 41 }; 42 43 soc5200@f0000000 { 44 #address-cells = <1>; 45 #size-cells = <1>; 46 compatible = "fsl,mpc5200-immr"; --- 186 unchanged lines hidden --- | 39 device_type = "memory"; 40 reg = <0x00000000 0x08000000>; // 128MB 41 }; 42 43 soc5200@f0000000 { 44 #address-cells = <1>; 45 #size-cells = <1>; 46 compatible = "fsl,mpc5200-immr"; --- 186 unchanged lines hidden --- |