ops-mace.c (c1f3ee120bb61045b1c0a3ead620d1d65af47130) ops-mace.c (8736595bb2b0ce6188ca31308c40921f3f02f35b)
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001 Keith M Wesolowski
7 */
8#include <linux/kernel.h>

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56 break;
57 case 4:
58 *val = mace->pci.config_data.l;
59 break;
60 }
61 /* ack possible master abort */
62 mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT;
63 mace->pci.control = control;
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001 Keith M Wesolowski
7 */
8#include <linux/kernel.h>

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56 break;
57 case 4:
58 *val = mace->pci.config_data.l;
59 break;
60 }
61 /* ack possible master abort */
62 mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT;
63 mace->pci.control = control;
64 /*
65 * someone forgot to set the ultra bit for the onboard
66 * scsi chips; we fake it here
67 */
68 if (bus->number == 0 && reg == 0x40 && size == 4 &&
69 (devfn == (1 << 3) || devfn == (2 << 3)))
70 *val |= 0x1000;
64
65 DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
66
67 return PCIBIOS_SUCCESSFUL;
68}
69
70static int
71mace_pci_write_config(struct pci_bus *bus, unsigned int devfn,

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72 DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
73
74 return PCIBIOS_SUCCESSFUL;
75}
76
77static int
78mace_pci_write_config(struct pci_bus *bus, unsigned int devfn,

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