ops-mace.c (1da177e4c3f41524e886b7f1b8a0c1fc7321cac2) ops-mace.c (8cfaf45367d41400ce99e1757ab5690d1fc94dbc)
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001 Keith M Wesolowski
7 */
8#include <linux/kernel.h>

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24 *
25 * 0 aic7xxx 0
26 * 1 aic7xxx 1
27 * 2 expansion slot
28 * 3 N/C
29 * 4 N/C
30 */
31
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001 Keith M Wesolowski
7 */
8#include <linux/kernel.h>

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24 *
25 * 0 aic7xxx 0
26 * 1 aic7xxx 1
27 * 2 expansion slot
28 * 3 N/C
29 * 4 N/C
30 */
31
32#define chkslot(_bus,_devfn) \
33do { \
34 if ((_bus)->number > 0 || PCI_SLOT (_devfn) < 1 \
35 || PCI_SLOT (_devfn) > 3) \
36 return PCIBIOS_DEVICE_NOT_FOUND; \
37} while (0)
32static inline int mkaddr(struct pci_bus *bus, unsigned int devfn,
33 unsigned int reg)
34{
35 return ((bus->number & 0xff) << 16) |
36 (devfn & 0xff) << 8) |
37 (reg & 0xfc);
38}
38
39
39#define mkaddr(_devfn, _reg) \
40((((_devfn) & 0xffUL) << 8) | ((_reg) & 0xfcUL))
41
42static int
43mace_pci_read_config(struct pci_bus *bus, unsigned int devfn,
44 int reg, int size, u32 *val)
45{
40
41static int
42mace_pci_read_config(struct pci_bus *bus, unsigned int devfn,
43 int reg, int size, u32 *val)
44{
46 chkslot(bus, devfn);
47 mace->pci.config_addr = mkaddr(devfn, reg);
45 mace->pci.config_addr = mkaddr(bus, devfn, reg);
48 switch (size) {
49 case 1:
50 *val = mace->pci.config_data.b[(reg & 3) ^ 3];
51 break;
52 case 2:
53 *val = mace->pci.config_data.w[((reg >> 1) & 1) ^ 1];
54 break;
55 case 4:

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61
62 return PCIBIOS_SUCCESSFUL;
63}
64
65static int
66mace_pci_write_config(struct pci_bus *bus, unsigned int devfn,
67 int reg, int size, u32 val)
68{
46 switch (size) {
47 case 1:
48 *val = mace->pci.config_data.b[(reg & 3) ^ 3];
49 break;
50 case 2:
51 *val = mace->pci.config_data.w[((reg >> 1) & 1) ^ 1];
52 break;
53 case 4:

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59
60 return PCIBIOS_SUCCESSFUL;
61}
62
63static int
64mace_pci_write_config(struct pci_bus *bus, unsigned int devfn,
65 int reg, int size, u32 val)
66{
69 chkslot(bus, devfn);
70 mace->pci.config_addr = mkaddr(devfn, reg);
67 mace->pci.config_addr = mkaddr(bus, devfn, reg);
71 switch (size) {
72 case 1:
73 mace->pci.config_data.b[(reg & 3) ^ 3] = val;
74 break;
75 case 2:
76 mace->pci.config_data.w[((reg >> 1) & 1) ^ 1] = val;
77 break;
78 case 4:

--- 13 unchanged lines hidden --- 		68 switch (size) {
69 case 1:
70 mace->pci.config_data.b[(reg & 3) ^ 3] = val;
71 break;
72 case 2:
73 mace->pci.config_data.w[((reg >> 1) & 1) ^ 1] = val;
74 break;
75 case 4:

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