fixup-malta.c (e19b9137142988bec5a76c5f8bdf12a77ea802b0) fixup-malta.c (fa12b773b7fb5830469086d36eb5be9f6b512f4d)
1#include <linux/init.h>
2#include <linux/pci.h>
3#include <asm/mips-boards/piix4.h>
4
5/* PCI interrupt pins */
6#define PCIA 1
7#define PCIB 2
8#define PCIC 3

--- 37 unchanged lines hidden (view full) ---

46}
47
48/* Do platform specific device initialization at pci_enable_device() time */
49int pcibios_plat_dev_init(struct pci_dev *dev)
50{
51 return 0;
52}
53
1#include <linux/init.h>
2#include <linux/pci.h>
3#include <asm/mips-boards/piix4.h>
4
5/* PCI interrupt pins */
6#define PCIA 1
7#define PCIB 2
8#define PCIC 3

--- 37 unchanged lines hidden (view full) ---

46}
47
48/* Do platform specific device initialization at pci_enable_device() time */
49int pcibios_plat_dev_init(struct pci_dev *dev)
50{
51 return 0;
52}
53
54static void malta_piix_func3_base_fixup(struct pci_dev *dev)
55{
56 /* Set a sane PM I/O base address */
57 pci_write_config_word(dev, PIIX4_FUNC3_PMBA, 0x1000);
58
59 /* Enable access to the PM I/O region */
60 pci_write_config_byte(dev, PIIX4_FUNC3_PMREGMISC,
61 PIIX4_FUNC3_PMREGMISC_EN);
62}
63
64DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
65 malta_piix_func3_base_fixup);
66
54static void malta_piix_func0_fixup(struct pci_dev *pdev)
55{
56 unsigned char reg_val;
57 u32 reg_val32;
58 /* PIIX PIRQC[A:D] irq mappings */
59 static int piixirqmap[PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_MAX] = {
60 0, 0, 0, 3,
61 4, 5, 6, 7,

--- 78 unchanged lines hidden --- 		67static void malta_piix_func0_fixup(struct pci_dev *pdev)
68{
69 unsigned char reg_val;
70 u32 reg_val32;
71 /* PIIX PIRQC[A:D] irq mappings */
72 static int piixirqmap[PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_MAX] = {
73 0, 0, 0, 3,
74 4, 5, 6, 7,

--- 78 unchanged lines hidden ---