fixup-cobalt.c (e5451c8f8330e03ad3cfa16048b4daf961af434f) fixup-cobalt.c (19a8d6b7604df85402deecae01d7861cb1d40c89)
1/*
2 * Cobalt Qube/Raq PCI support
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997, 2002, 2003 by Ralf Baechle

--- 133 unchanged lines hidden (view full) ---

142 cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(id);
143
144 printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id);
145}
146
147DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0,
148 qube_raq_via_board_id_fixup);
149
1/*
2 * Cobalt Qube/Raq PCI support
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997, 2002, 2003 by Ralf Baechle

--- 133 unchanged lines hidden (view full) ---

142 cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(id);
143
144 printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id);
145}
146
147DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0,
148 qube_raq_via_board_id_fixup);
149
150static char irq_tab_qube1[] __initdata = {
150static char irq_tab_qube1[] = {
151 [COBALT_PCICONF_CPU] = 0,
152 [COBALT_PCICONF_ETH0] = QUBE1_ETH0_IRQ,
153 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
154 [COBALT_PCICONF_VIA] = 0,
155 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
156 [COBALT_PCICONF_ETH1] = 0
157};
158
151 [COBALT_PCICONF_CPU] = 0,
152 [COBALT_PCICONF_ETH0] = QUBE1_ETH0_IRQ,
153 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
154 [COBALT_PCICONF_VIA] = 0,
155 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
156 [COBALT_PCICONF_ETH1] = 0
157};
158
159static char irq_tab_cobalt[] __initdata = {
159static char irq_tab_cobalt[] = {
160 [COBALT_PCICONF_CPU] = 0,
161 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
162 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
163 [COBALT_PCICONF_VIA] = 0,
164 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
165 [COBALT_PCICONF_ETH1] = ETH1_IRQ
166};
167
160 [COBALT_PCICONF_CPU] = 0,
161 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
162 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
163 [COBALT_PCICONF_VIA] = 0,
164 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
165 [COBALT_PCICONF_ETH1] = ETH1_IRQ
166};
167
168static char irq_tab_raq2[] __initdata = {
168static char irq_tab_raq2[] = {
169 [COBALT_PCICONF_CPU] = 0,
170 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
171 [COBALT_PCICONF_RAQSCSI] = RAQ2_SCSI_IRQ,
172 [COBALT_PCICONF_VIA] = 0,
173 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
174 [COBALT_PCICONF_ETH1] = ETH1_IRQ
175};
176
169 [COBALT_PCICONF_CPU] = 0,
170 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
171 [COBALT_PCICONF_RAQSCSI] = RAQ2_SCSI_IRQ,
172 [COBALT_PCICONF_VIA] = 0,
173 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
174 [COBALT_PCICONF_ETH1] = ETH1_IRQ
175};
176
177int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
177int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
178{
179 if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
180 return irq_tab_qube1[slot];
181
182 if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
183 return irq_tab_raq2[slot];
184
185 return irq_tab_cobalt[slot];
186}
187
188/* Do platform specific device initialization at pci_enable_device() time */
189int pcibios_plat_dev_init(struct pci_dev *dev)
190{
191 return 0;
192}
178{
179 if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
180 return irq_tab_qube1[slot];
181
182 if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
183 return irq_tab_raq2[slot];
184
185 return irq_tab_cobalt[slot];
186}
187
188/* Do platform specific device initialization at pci_enable_device() time */
189int pcibios_plat_dev_init(struct pci_dev *dev)
190{
191 return 0;
192}