| uasm-mips.c (a8e897ad00d3cfd0ab9029978f0c3f8ecd6fba61) | uasm-mips.c (16d21a812f6bfcbfa84ccc19d38abe797c71b73e) |
|---|---|
| 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * A small micro-assembler. It is intentionally kept simple, does only 7 * support a subset of instructions, and does not try to hide pipeline 8 * effects like branch delay slots. --- 82 unchanged lines hidden (view full) --- 91 { insn_lh, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 92 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 93 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 94 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM }, 95 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 96 { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD }, 97 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, 98 { insn_mfhi, M(spec_op, 0, 0, 0, 0, mfhi_op), RD }, | 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * A small micro-assembler. It is intentionally kept simple, does only 7 * support a subset of instructions, and does not try to hide pipeline 8 * effects like branch delay slots. --- 82 unchanged lines hidden (view full) --- 91 { insn_lh, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 92 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 93 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 94 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM }, 95 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 96 { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD }, 97 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, 98 { insn_mfhi, M(spec_op, 0, 0, 0, 0, mfhi_op), RD }, |
| 99 { insn_mflo, M(spec_op, 0, 0, 0, 0, mflo_op), RD }, |
|
| 99 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, 100 { insn_mul, M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD}, 101 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 102 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD }, 103 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 104 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 }, 105 { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE }, 106 { insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, --- 111 unchanged lines hidden --- | 100 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, 101 { insn_mul, M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD}, 102 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 103 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD }, 104 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 105 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 }, 106 { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE }, 107 { insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, --- 111 unchanged lines hidden --- |