dma-noncoherent.c (2a267e7c41aa88215de2b542de797d03d16ecdfd) dma-noncoherent.c (2e96e04d25caaca8039ba9561e7e02ee8a192553)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
4 * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
5 * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
6 */
7#include <linux/dma-direct.h>
8#include <linux/dma-noncoherent.h>

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39 * Presence of MAARs suggests that the CPU supports
40 * speculatively prefetching data, and therefore requires
41 * the post-DMA flush/invalidate.
42 */
43 return cpu_has_maar;
44 }
45}
46
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
4 * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
5 * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
6 */
7#include <linux/dma-direct.h>
8#include <linux/dma-noncoherent.h>

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39 * Presence of MAARs suggests that the CPU supports
40 * speculatively prefetching data, and therefore requires
41 * the post-DMA flush/invalidate.
42 */
43 return cpu_has_maar;
44 }
45}
46
47void *arch_dma_alloc(struct device *dev, size_t size,
48 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
47void arch_dma_prep_coherent(struct page *page, size_t size)
49{
48{
50 void *ret;
49 dma_cache_wback_inv((unsigned long)page_address(page), size);
50}
51
51
52 ret = dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
53 if (ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
54 dma_cache_wback_inv((unsigned long) ret, size);
55 ret = (void *)UNCAC_ADDR(ret);
56 }
57
58 return ret;
52void *uncached_kernel_address(void *addr)
53{
54 return (void *)(__pa(addr) + UNCAC_BASE);
59}
60
55}
56
61void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
62 dma_addr_t dma_addr, unsigned long attrs)
57void *cached_kernel_address(void *addr)
63{
58{
64 if (!(attrs & DMA_ATTR_NON_CONSISTENT))
65 cpu_addr = (void *)CAC_ADDR((unsigned long)cpu_addr);
66 dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
59 return __va(addr) - UNCAC_BASE;
67}
68
69long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
70 dma_addr_t dma_addr)
71{
60}
61
62long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
63 dma_addr_t dma_addr)
64{
72 unsigned long addr = CAC_ADDR((unsigned long)cpu_addr);
73 return page_to_pfn(virt_to_page((void *)addr));
65 return page_to_pfn(virt_to_page(cached_kernel_address(cpu_addr)));
74}
75
76pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
77 unsigned long attrs)
78{
79 if (attrs & DMA_ATTR_WRITE_COMBINE)
80 return pgprot_writecombine(prot);
81 return pgprot_noncached(prot);

--- 85 unchanged lines hidden --- 		66}
67
68pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
69 unsigned long attrs)
70{
71 if (attrs & DMA_ATTR_WRITE_COMBINE)
72 return pgprot_writecombine(prot);
73 return pgprot_noncached(prot);

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