irq.c (aa0f58b4666f7662d178905ac45d94914f72d3d4) irq.c (39588164d3c94c6519f0b826ecd05d7ee3da16c4)
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2010 John Crispin <john@phrozen.org>
7 * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
8 */

--- 63 unchanged lines hidden (view full) ---

72{
73 if (exin < exin_avail)
74 return ltq_eiu_irq[exin];
75 return -1;
76}
77
78void ltq_disable_irq(struct irq_data *d)
79{
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2010 John Crispin <john@phrozen.org>
7 * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
8 */

--- 63 unchanged lines hidden (view full) ---

72{
73 if (exin < exin_avail)
74 return ltq_eiu_irq[exin];
75 return -1;
76}
77
78void ltq_disable_irq(struct irq_data *d)
79{
80 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
81 int im = offset / INT_NUM_IM_OFFSET;
80 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
81 unsigned long im = offset / INT_NUM_IM_OFFSET;
82
83 offset %= INT_NUM_IM_OFFSET;
84 ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) & ~BIT(offset),
85 LTQ_ICU_IM0_IER);
86}
87
88void ltq_mask_and_ack_irq(struct irq_data *d)
89{
82
83 offset %= INT_NUM_IM_OFFSET;
84 ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) & ~BIT(offset),
85 LTQ_ICU_IM0_IER);
86}
87
88void ltq_mask_and_ack_irq(struct irq_data *d)
89{
90 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
91 int im = offset / INT_NUM_IM_OFFSET;
90 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
91 unsigned long im = offset / INT_NUM_IM_OFFSET;
92
93 offset %= INT_NUM_IM_OFFSET;
94 ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) & ~BIT(offset),
95 LTQ_ICU_IM0_IER);
96 ltq_icu_w32(im, BIT(offset), LTQ_ICU_IM0_ISR);
97}
98
99static void ltq_ack_irq(struct irq_data *d)
100{
92
93 offset %= INT_NUM_IM_OFFSET;
94 ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) & ~BIT(offset),
95 LTQ_ICU_IM0_IER);
96 ltq_icu_w32(im, BIT(offset), LTQ_ICU_IM0_ISR);
97}
98
99static void ltq_ack_irq(struct irq_data *d)
100{
101 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
102 int im = offset / INT_NUM_IM_OFFSET;
101 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
102 unsigned long im = offset / INT_NUM_IM_OFFSET;
103
104 offset %= INT_NUM_IM_OFFSET;
105 ltq_icu_w32(im, BIT(offset), LTQ_ICU_IM0_ISR);
106}
107
108void ltq_enable_irq(struct irq_data *d)
109{
103
104 offset %= INT_NUM_IM_OFFSET;
105 ltq_icu_w32(im, BIT(offset), LTQ_ICU_IM0_ISR);
106}
107
108void ltq_enable_irq(struct irq_data *d)
109{
110 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
111 int im = offset / INT_NUM_IM_OFFSET;
110 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
111 unsigned long im = offset / INT_NUM_IM_OFFSET;
112
113 offset %= INT_NUM_IM_OFFSET;
114 ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) | BIT(offset),
115 LTQ_ICU_IM0_IER);
116}
117
118static int ltq_eiu_settype(struct irq_data *d, unsigned int type)
119{

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219 .irq_ack = ltq_ack_irq,
220 .irq_mask = ltq_disable_irq,
221 .irq_mask_ack = ltq_mask_and_ack_irq,
222 .irq_set_type = ltq_eiu_settype,
223};
224
225static void ltq_hw_irq_handler(struct irq_desc *desc)
226{
112
113 offset %= INT_NUM_IM_OFFSET;
114 ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) | BIT(offset),
115 LTQ_ICU_IM0_IER);
116}
117
118static int ltq_eiu_settype(struct irq_data *d, unsigned int type)
119{

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219 .irq_ack = ltq_ack_irq,
220 .irq_mask = ltq_disable_irq,
221 .irq_mask_ack = ltq_mask_and_ack_irq,
222 .irq_set_type = ltq_eiu_settype,
223};
224
225static void ltq_hw_irq_handler(struct irq_desc *desc)
226{
227 int module = irq_desc_get_irq(desc) - 2;
227 unsigned int module = irq_desc_get_irq(desc) - 2;
228 u32 irq;
228 u32 irq;
229 int hwirq;
229 irq_hw_number_t hwirq;
230
231 irq = ltq_icu_r32(module, LTQ_ICU_IM0_IOSR);
232 if (irq == 0)
233 return;
234
235 /*
236 * silicon bug causes only the msb set to 1 to be valid. all
237 * other bits might be bogus

--- 121 unchanged lines hidden --- 		230
231 irq = ltq_icu_r32(module, LTQ_ICU_IM0_IOSR);
232 if (irq == 0)
233 return;
234
235 /*
236 * silicon bug causes only the msb set to 1 to be valid. all
237 * other bits might be bogus

--- 121 unchanged lines hidden ---