cpu.h (4ba24fef3eb3b142197135223b90ced2f319cd53) cpu.h (aca5721e9524de0306ba914e678365fcb704c60c)
1/*
2 * cpu.h: Values of the PRId register used to match up
3 * various MIPS cpu types.
4 *
5 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
6 * Copyright (C) 2004, 2013 Maciej W. Rozycki
7 */
8#ifndef _ASM_CPU_H

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88#define PRID_IMP_LOONGSON_64 0x6300 /* Loongson-2/3 */
89
90#define PRID_IMP_UNKNOWN 0xff00
91
92/*
93 * These are the PRID's for when 23:16 == PRID_COMP_MIPS
94 */
95
1/*
2 * cpu.h: Values of the PRId register used to match up
3 * various MIPS cpu types.
4 *
5 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
6 * Copyright (C) 2004, 2013 Maciej W. Rozycki
7 */
8#ifndef _ASM_CPU_H

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88#define PRID_IMP_LOONGSON_64 0x6300 /* Loongson-2/3 */
89
90#define PRID_IMP_UNKNOWN 0xff00
91
92/*
93 * These are the PRID's for when 23:16 == PRID_COMP_MIPS
94 */
95
96#define PRID_IMP_QEMU_GENERIC 0x0000
96#define PRID_IMP_4KC 0x8000
97#define PRID_IMP_5KC 0x8100
98#define PRID_IMP_20KC 0x8200
99#define PRID_IMP_4KEC 0x8400
100#define PRID_IMP_4KSC 0x8600
101#define PRID_IMP_25KF 0x8800
102#define PRID_IMP_5KE 0x8900
103#define PRID_IMP_4KECR2 0x9000

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307
308 /*
309 * MIPS64 class processors
310 */
311 CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
312 CPU_LOONGSON3, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
313 CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP,
314
97#define PRID_IMP_4KC 0x8000
98#define PRID_IMP_5KC 0x8100
99#define PRID_IMP_20KC 0x8200
100#define PRID_IMP_4KEC 0x8400
101#define PRID_IMP_4KSC 0x8600
102#define PRID_IMP_25KF 0x8800
103#define PRID_IMP_5KE 0x8900
104#define PRID_IMP_4KECR2 0x9000

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308
309 /*
310 * MIPS64 class processors
311 */
312 CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
313 CPU_LOONGSON3, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
314 CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP,
315
316 CPU_QEMU_GENERIC,
317
315 CPU_LAST
316};
317
318#endif /* !__ASSEMBLY */
319
320/*
321 * ISA Level encodings
322 *

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318 CPU_LAST
319};
320
321#endif /* !__ASSEMBLY */
322
323/*
324 * ISA Level encodings
325 *

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