jz4780.dtsi (3eb66e91a25497065c5322b1268cbc3953642227) | jz4780.dtsi (36aafdbd52881eda9073c4d03d65438a16b87a92) |
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1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/clock/jz4780-cgu.h> 3#include <dt-bindings/dma/jz4780-dma.h> 4 5/ { 6 #address-cells = <1>; 7 #size-cells = <1>; 8 compatible = "ingenic,jz4780"; --- 32 unchanged lines hidden (view full) --- 41 reg = <0x10000000 0x100>; 42 43 clocks = <&ext>, <&rtc>; 44 clock-names = "ext", "rtc"; 45 46 #clock-cells = <1>; 47 }; 48 | 1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/clock/jz4780-cgu.h> 3#include <dt-bindings/dma/jz4780-dma.h> 4 5/ { 6 #address-cells = <1>; 7 #size-cells = <1>; 8 compatible = "ingenic,jz4780"; --- 32 unchanged lines hidden (view full) --- 41 reg = <0x10000000 0x100>; 42 43 clocks = <&ext>, <&rtc>; 44 clock-names = "ext", "rtc"; 45 46 #clock-cells = <1>; 47 }; 48 |
49 tcu: timer@10002000 { 50 compatible = "ingenic,jz4780-tcu", 51 "ingenic,jz4770-tcu", 52 "simple-mfd"; 53 reg = <0x10002000 0x1000>; 54 #address-cells = <1>; 55 #size-cells = <1>; 56 ranges = <0x0 0x10002000 0x1000>; 57 58 #clock-cells = <1>; 59 60 clocks = <&cgu JZ4780_CLK_RTCLK 61 &cgu JZ4780_CLK_EXCLK 62 &cgu JZ4780_CLK_PCLK>; 63 clock-names = "rtc", "ext", "pclk"; 64 65 interrupt-controller; 66 #interrupt-cells = <1>; 67 68 interrupt-parent = <&intc>; 69 interrupts = <27 26 25>; 70 }; 71 |
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49 rtc_dev: rtc@10003000 { 50 compatible = "ingenic,jz4780-rtc"; 51 reg = <0x10003000 0x4c>; 52 53 interrupt-parent = <&intc>; 54 interrupts = <32>; 55 56 clocks = <&cgu JZ4780_CLK_RTCLK>; --- 271 unchanged lines hidden --- | 72 rtc_dev: rtc@10003000 { 73 compatible = "ingenic,jz4780-rtc"; 74 reg = <0x10003000 0x4c>; 75 76 interrupt-parent = <&intc>; 77 interrupts = <32>; 78 79 clocks = <&cgu JZ4780_CLK_RTCLK>; --- 271 unchanged lines hidden --- |