jz4740.dtsi (e5451c8f8330e03ad3cfa16048b4daf961af434f) jz4740.dtsi (9d1e7875fafc45dbcbe3d816b022aa1f17219f32)
1#include <dt-bindings/clock/jz4740-cgu.h>
2
3/ {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ingenic,jz4740";
7
8 cpuintc: interrupt-controller@0 {

--- 51 unchanged lines hidden (view full) ---

60 reg = <0x10031000 0x100>;
61
62 interrupt-parent = <&intc>;
63 interrupts = <8>;
64
65 clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
66 clock-names = "baud", "module";
67 };
1#include <dt-bindings/clock/jz4740-cgu.h>
2
3/ {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ingenic,jz4740";
7
8 cpuintc: interrupt-controller@0 {

--- 51 unchanged lines hidden (view full) ---

60 reg = <0x10031000 0x100>;
61
62 interrupt-parent = <&intc>;
63 interrupts = <8>;
64
65 clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
66 clock-names = "baud", "module";
67 };
68
69 uhc: uhc@13030000 {
70 compatible = "ingenic,jz4740-ohci", "generic-ohci";
71 reg = <0x13030000 0x1000>;
72
73 clocks = <&cgu JZ4740_CLK_UHC>;
74 assigned-clocks = <&cgu JZ4740_CLK_UHC>;
75 assigned-clock-rates = <48000000>;
76
77 interrupt-parent = <&intc>;
78 interrupts = <3>;
79
80 status = "disabled";
81 };
68};
82};