irq.c (6224892c819e96898534c107c72b80a1a8e75abf) | irq.c (04712f3ff6e3a42ef658b55b0f99478f4f0682e3) |
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1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7 * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr> 8 */ --- 57 unchanged lines hidden (view full) --- 66#define irq_bits 32 67#define is_ext_irq_cascaded 1 68#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) 69#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE) 70#define ext_irq_count 4 71#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6358 72#define ext_irq_cfg_reg2 0 73#endif | 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7 * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr> 8 */ --- 57 unchanged lines hidden (view full) --- 66#define irq_bits 32 67#define is_ext_irq_cascaded 1 68#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) 69#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE) 70#define ext_irq_count 4 71#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6358 72#define ext_irq_cfg_reg2 0 73#endif |
74#ifdef CONFIG_BCM63XX_CPU_6368 75#define irq_stat_reg PERF_IRQSTAT_6368_REG 76#define irq_mask_reg PERF_IRQMASK_6368_REG 77#define irq_bits 64 78#define is_ext_irq_cascaded 1 79#define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE) 80#define ext_irq_end (BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE) 81#define ext_irq_count 6 82#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6368 83#define ext_irq_cfg_reg2 PERF_EXTIRQ_CFG_REG2_6368 84#endif |
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74 75#if irq_bits == 32 76#define dispatch_internal __dispatch_internal 77#define internal_irq_mask __internal_irq_mask_32 78#define internal_irq_unmask __internal_irq_unmask_32 79#else 80#define dispatch_internal __dispatch_internal_64 81#define internal_irq_mask __internal_irq_mask_64 --- 47 unchanged lines hidden (view full) --- 129 irq_mask_addr += PERF_IRQMASK_6358_REG; 130 irq_bits = 32; 131 ext_irq_count = 4; 132 is_ext_irq_cascaded = 1; 133 ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; 134 ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; 135 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358; 136 break; | 85 86#if irq_bits == 32 87#define dispatch_internal __dispatch_internal 88#define internal_irq_mask __internal_irq_mask_32 89#define internal_irq_unmask __internal_irq_unmask_32 90#else 91#define dispatch_internal __dispatch_internal_64 92#define internal_irq_mask __internal_irq_mask_64 --- 47 unchanged lines hidden (view full) --- 140 irq_mask_addr += PERF_IRQMASK_6358_REG; 141 irq_bits = 32; 142 ext_irq_count = 4; 143 is_ext_irq_cascaded = 1; 144 ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; 145 ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; 146 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358; 147 break; |
148 case BCM6368_CPU_ID: 149 irq_stat_addr += PERF_IRQSTAT_6368_REG; 150 irq_mask_addr += PERF_IRQMASK_6368_REG; 151 irq_bits = 64; 152 ext_irq_count = 6; 153 is_ext_irq_cascaded = 1; 154 ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE; 155 ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE; 156 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368; 157 ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368; 158 break; |
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137 default: 138 BUG(); 139 } 140 141 if (irq_bits == 32) { 142 dispatch_internal = __dispatch_internal; 143 internal_irq_mask = __internal_irq_mask_32; 144 internal_irq_unmask = __internal_irq_unmask_32; --- 256 unchanged lines hidden (view full) --- 401 else 402 reg &= ~EXTIRQ_CFG_SENSE_6348(irq); 403 if (bothedge) 404 reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq); 405 else 406 reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); 407 } 408 | 159 default: 160 BUG(); 161 } 162 163 if (irq_bits == 32) { 164 dispatch_internal = __dispatch_internal; 165 internal_irq_mask = __internal_irq_mask_32; 166 internal_irq_unmask = __internal_irq_unmask_32; --- 256 unchanged lines hidden (view full) --- 423 else 424 reg &= ~EXTIRQ_CFG_SENSE_6348(irq); 425 if (bothedge) 426 reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq); 427 else 428 reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); 429 } 430 |
409 if (BCMCPU_IS_6338() || BCMCPU_IS_6358()) { | 431 if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) { |
410 if (levelsense) 411 reg |= EXTIRQ_CFG_LEVELSENSE(irq); 412 else 413 reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); 414 if (sense) 415 reg |= EXTIRQ_CFG_SENSE(irq); 416 else 417 reg &= ~EXTIRQ_CFG_SENSE(irq); --- 66 unchanged lines hidden --- | 432 if (levelsense) 433 reg |= EXTIRQ_CFG_LEVELSENSE(irq); 434 else 435 reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); 436 if (sense) 437 reg |= EXTIRQ_CFG_SENSE(irq); 438 else 439 reg &= ~EXTIRQ_CFG_SENSE(irq); --- 66 unchanged lines hidden --- |