clk.c (0ebe8aaefade244b224d65d1c83addea21dce4c3) clk.c (26b8c07f59ceff7b4ca40fb4bbc81abff01e8cf0)
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 */
8

--- 376 unchanged lines hidden (view full) ---

385
386EXPORT_SYMBOL(clk_get);
387
388void clk_put(struct clk *clk)
389{
390}
391
392EXPORT_SYMBOL(clk_put);
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 */
8

--- 376 unchanged lines hidden (view full) ---

385
386EXPORT_SYMBOL(clk_get);
387
388void clk_put(struct clk *clk)
389{
390}
391
392EXPORT_SYMBOL(clk_put);
393
394#define HSSPI_PLL_HZ_6328 133333333
395#define HSSPI_PLL_HZ_6362 400000000
396
397static int __init bcm63xx_clk_init(void)
398{
399 switch (bcm63xx_get_cpu_id()) {
400 case BCM6328_CPU_ID:
401 clk_hsspi.rate = HSSPI_PLL_HZ_6328;
402 break;
403 case BCM6362_CPU_ID:
404 clk_hsspi.rate = HSSPI_PLL_HZ_6362;
405 break;
406 }
407
408 return 0;
409}
410arch_initcall(bcm63xx_clk_init);