inst.h (4e59e5a46936dd649208f348ead678c35197203d) inst.h (5dc615520c4dfb358245680f1904bad61116648e)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 */
5#ifndef _ASM_INST_H
6#define _ASM_INST_H
7
8#include <linux/types.h>

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340 return -(1L << (bit - 1)) <= val && val < (1L << (bit - 1));
341}
342
343static inline bool unsigned_imm_check(unsigned long val, unsigned int bit)
344{
345 return val < (1UL << bit);
346}
347
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 */
5#ifndef _ASM_INST_H
6#define _ASM_INST_H
7
8#include <linux/types.h>

--- 331 unchanged lines hidden (view full) ---

340 return -(1L << (bit - 1)) <= val && val < (1L << (bit - 1));
341}
342
343static inline bool unsigned_imm_check(unsigned long val, unsigned int bit)
344{
345 return val < (1UL << bit);
346}
347
348#define DEF_EMIT_REG0I26_FORMAT(NAME, OP) \
349static inline void emit_##NAME(union loongarch_instruction *insn, \
350 int offset) \
351{ \
352 unsigned int immediate_l, immediate_h; \
353 \
354 immediate_l = offset & 0xffff; \
355 offset >>= 16; \
356 immediate_h = offset & 0x3ff; \
357 \
358 insn->reg0i26_format.opcode = OP; \
359 insn->reg0i26_format.immediate_l = immediate_l; \
360 insn->reg0i26_format.immediate_h = immediate_h; \
361}
362
363DEF_EMIT_REG0I26_FORMAT(b, b_op)
364
365#define DEF_EMIT_REG1I20_FORMAT(NAME, OP) \
366static inline void emit_##NAME(union loongarch_instruction *insn, \
367 enum loongarch_gpr rd, int imm) \
368{ \
369 insn->reg1i20_format.opcode = OP; \
370 insn->reg1i20_format.immediate = imm; \
371 insn->reg1i20_format.rd = rd; \
372}
373
374DEF_EMIT_REG1I20_FORMAT(lu12iw, lu12iw_op)
375DEF_EMIT_REG1I20_FORMAT(lu32id, lu32id_op)
376DEF_EMIT_REG1I20_FORMAT(pcaddu18i, pcaddu18i_op)
377
378#define DEF_EMIT_REG2_FORMAT(NAME, OP) \
379static inline void emit_##NAME(union loongarch_instruction *insn, \
380 enum loongarch_gpr rd, \
381 enum loongarch_gpr rj) \
382{ \
383 insn->reg2_format.opcode = OP; \
384 insn->reg2_format.rd = rd; \
385 insn->reg2_format.rj = rj; \
386}
387
388DEF_EMIT_REG2_FORMAT(revb2h, revb2h_op)
389DEF_EMIT_REG2_FORMAT(revb2w, revb2w_op)
390DEF_EMIT_REG2_FORMAT(revbd, revbd_op)
391
392#define DEF_EMIT_REG2I5_FORMAT(NAME, OP) \
393static inline void emit_##NAME(union loongarch_instruction *insn, \
394 enum loongarch_gpr rd, \
395 enum loongarch_gpr rj, \
396 int imm) \
397{ \
398 insn->reg2i5_format.opcode = OP; \
399 insn->reg2i5_format.immediate = imm; \
400 insn->reg2i5_format.rd = rd; \
401 insn->reg2i5_format.rj = rj; \
402}
403
404DEF_EMIT_REG2I5_FORMAT(slliw, slliw_op)
405DEF_EMIT_REG2I5_FORMAT(srliw, srliw_op)
406DEF_EMIT_REG2I5_FORMAT(sraiw, sraiw_op)
407
408#define DEF_EMIT_REG2I6_FORMAT(NAME, OP) \
409static inline void emit_##NAME(union loongarch_instruction *insn, \
410 enum loongarch_gpr rd, \
411 enum loongarch_gpr rj, \
412 int imm) \
413{ \
414 insn->reg2i6_format.opcode = OP; \
415 insn->reg2i6_format.immediate = imm; \
416 insn->reg2i6_format.rd = rd; \
417 insn->reg2i6_format.rj = rj; \
418}
419
420DEF_EMIT_REG2I6_FORMAT(sllid, sllid_op)
421DEF_EMIT_REG2I6_FORMAT(srlid, srlid_op)
422DEF_EMIT_REG2I6_FORMAT(sraid, sraid_op)
423
424#define DEF_EMIT_REG2I12_FORMAT(NAME, OP) \
425static inline void emit_##NAME(union loongarch_instruction *insn, \
426 enum loongarch_gpr rd, \
427 enum loongarch_gpr rj, \
428 int imm) \
429{ \
430 insn->reg2i12_format.opcode = OP; \
431 insn->reg2i12_format.immediate = imm; \
432 insn->reg2i12_format.rd = rd; \
433 insn->reg2i12_format.rj = rj; \
434}
435
436DEF_EMIT_REG2I12_FORMAT(addiw, addiw_op)
437DEF_EMIT_REG2I12_FORMAT(addid, addid_op)
438DEF_EMIT_REG2I12_FORMAT(lu52id, lu52id_op)
439DEF_EMIT_REG2I12_FORMAT(andi, andi_op)
440DEF_EMIT_REG2I12_FORMAT(ori, ori_op)
441DEF_EMIT_REG2I12_FORMAT(xori, xori_op)
442DEF_EMIT_REG2I12_FORMAT(ldbu, ldbu_op)
443DEF_EMIT_REG2I12_FORMAT(ldhu, ldhu_op)
444DEF_EMIT_REG2I12_FORMAT(ldwu, ldwu_op)
445DEF_EMIT_REG2I12_FORMAT(ldd, ldd_op)
446DEF_EMIT_REG2I12_FORMAT(stb, stb_op)
447DEF_EMIT_REG2I12_FORMAT(sth, sth_op)
448DEF_EMIT_REG2I12_FORMAT(stw, stw_op)
449DEF_EMIT_REG2I12_FORMAT(std, std_op)
450
451#define DEF_EMIT_REG2I14_FORMAT(NAME, OP) \
452static inline void emit_##NAME(union loongarch_instruction *insn, \
453 enum loongarch_gpr rd, \
454 enum loongarch_gpr rj, \
455 int imm) \
456{ \
457 insn->reg2i14_format.opcode = OP; \
458 insn->reg2i14_format.immediate = imm; \
459 insn->reg2i14_format.rd = rd; \
460 insn->reg2i14_format.rj = rj; \
461}
462
463DEF_EMIT_REG2I14_FORMAT(llw, llw_op)
464DEF_EMIT_REG2I14_FORMAT(scw, scw_op)
465DEF_EMIT_REG2I14_FORMAT(lld, lld_op)
466DEF_EMIT_REG2I14_FORMAT(scd, scd_op)
467DEF_EMIT_REG2I14_FORMAT(ldptrw, ldptrw_op)
468DEF_EMIT_REG2I14_FORMAT(stptrw, stptrw_op)
469DEF_EMIT_REG2I14_FORMAT(ldptrd, ldptrd_op)
470DEF_EMIT_REG2I14_FORMAT(stptrd, stptrd_op)
471
472#define DEF_EMIT_REG2I16_FORMAT(NAME, OP) \
473static inline void emit_##NAME(union loongarch_instruction *insn, \
474 enum loongarch_gpr rj, \
475 enum loongarch_gpr rd, \
476 int offset) \
477{ \
478 insn->reg2i16_format.opcode = OP; \
479 insn->reg2i16_format.immediate = offset; \
480 insn->reg2i16_format.rj = rj; \
481 insn->reg2i16_format.rd = rd; \
482}
483
484DEF_EMIT_REG2I16_FORMAT(beq, beq_op)
485DEF_EMIT_REG2I16_FORMAT(bne, bne_op)
486DEF_EMIT_REG2I16_FORMAT(blt, blt_op)
487DEF_EMIT_REG2I16_FORMAT(bge, bge_op)
488DEF_EMIT_REG2I16_FORMAT(bltu, bltu_op)
489DEF_EMIT_REG2I16_FORMAT(bgeu, bgeu_op)
490DEF_EMIT_REG2I16_FORMAT(jirl, jirl_op)
491
492#define DEF_EMIT_REG2BSTRD_FORMAT(NAME, OP) \
493static inline void emit_##NAME(union loongarch_instruction *insn, \
494 enum loongarch_gpr rd, \
495 enum loongarch_gpr rj, \
496 int msbd, \
497 int lsbd) \
498{ \
499 insn->reg2bstrd_format.opcode = OP; \
500 insn->reg2bstrd_format.msbd = msbd; \
501 insn->reg2bstrd_format.lsbd = lsbd; \
502 insn->reg2bstrd_format.rj = rj; \
503 insn->reg2bstrd_format.rd = rd; \
504}
505
506DEF_EMIT_REG2BSTRD_FORMAT(bstrpickd, bstrpickd_op)
507
508#define DEF_EMIT_REG3_FORMAT(NAME, OP) \
509static inline void emit_##NAME(union loongarch_instruction *insn, \
510 enum loongarch_gpr rd, \
511 enum loongarch_gpr rj, \
512 enum loongarch_gpr rk) \
513{ \
514 insn->reg3_format.opcode = OP; \
515 insn->reg3_format.rd = rd; \
516 insn->reg3_format.rj = rj; \
517 insn->reg3_format.rk = rk; \
518}
519
520DEF_EMIT_REG3_FORMAT(addd, addd_op)
521DEF_EMIT_REG3_FORMAT(subd, subd_op)
522DEF_EMIT_REG3_FORMAT(muld, muld_op)
523DEF_EMIT_REG3_FORMAT(divdu, divdu_op)
524DEF_EMIT_REG3_FORMAT(moddu, moddu_op)
525DEF_EMIT_REG3_FORMAT(and, and_op)
526DEF_EMIT_REG3_FORMAT(or, or_op)
527DEF_EMIT_REG3_FORMAT(xor, xor_op)
528DEF_EMIT_REG3_FORMAT(sllw, sllw_op)
529DEF_EMIT_REG3_FORMAT(slld, slld_op)
530DEF_EMIT_REG3_FORMAT(srlw, srlw_op)
531DEF_EMIT_REG3_FORMAT(srld, srld_op)
532DEF_EMIT_REG3_FORMAT(sraw, sraw_op)
533DEF_EMIT_REG3_FORMAT(srad, srad_op)
534DEF_EMIT_REG3_FORMAT(ldxbu, ldxbu_op)
535DEF_EMIT_REG3_FORMAT(ldxhu, ldxhu_op)
536DEF_EMIT_REG3_FORMAT(ldxwu, ldxwu_op)
537DEF_EMIT_REG3_FORMAT(ldxd, ldxd_op)
538DEF_EMIT_REG3_FORMAT(stxb, stxb_op)
539DEF_EMIT_REG3_FORMAT(stxh, stxh_op)
540DEF_EMIT_REG3_FORMAT(stxw, stxw_op)
541DEF_EMIT_REG3_FORMAT(stxd, stxd_op)
542DEF_EMIT_REG3_FORMAT(amaddw, amaddw_op)
543DEF_EMIT_REG3_FORMAT(amaddd, amaddd_op)
544DEF_EMIT_REG3_FORMAT(amandw, amandw_op)
545DEF_EMIT_REG3_FORMAT(amandd, amandd_op)
546DEF_EMIT_REG3_FORMAT(amorw, amorw_op)
547DEF_EMIT_REG3_FORMAT(amord, amord_op)
548DEF_EMIT_REG3_FORMAT(amxorw, amxorw_op)
549DEF_EMIT_REG3_FORMAT(amxord, amxord_op)
550DEF_EMIT_REG3_FORMAT(amswapw, amswapw_op)
551DEF_EMIT_REG3_FORMAT(amswapd, amswapd_op)
552
553#define DEF_EMIT_REG3SA2_FORMAT(NAME, OP) \
554static inline void emit_##NAME(union loongarch_instruction *insn, \
555 enum loongarch_gpr rd, \
556 enum loongarch_gpr rj, \
557 enum loongarch_gpr rk, \
558 int imm) \
559{ \
560 insn->reg3sa2_format.opcode = OP; \
561 insn->reg3sa2_format.immediate = imm; \
562 insn->reg3sa2_format.rd = rd; \
563 insn->reg3sa2_format.rj = rj; \
564 insn->reg3sa2_format.rk = rk; \
565}
566
567DEF_EMIT_REG3SA2_FORMAT(alsld, alsld_op)
568
348#endif /* _ASM_INST_H */
569#endif /* _ASM_INST_H */