| pgtable.h (9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e) | pgtable.h (2f0584f3f4bd60bcc8735172981fb0bff86e74e0) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef _ASM_IA64_PGTABLE_H 3#define _ASM_IA64_PGTABLE_H 4 5/* 6 * This file contains the functions and defines necessary to modify and use 7 * the IA-64 page table tree. 8 * --- 254 unchanged lines hidden (view full) --- 263#define pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0) 264#define pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0) 265 266/* 267 * Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit in the 268 * access rights: 269 */ 270#define pte_wrprotect(pte) (__pte(pte_val(pte) & ~_PAGE_AR_RW)) | 1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef _ASM_IA64_PGTABLE_H 3#define _ASM_IA64_PGTABLE_H 4 5/* 6 * This file contains the functions and defines necessary to modify and use 7 * the IA-64 page table tree. 8 * --- 254 unchanged lines hidden (view full) --- 263#define pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0) 264#define pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0) 265 266/* 267 * Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit in the 268 * access rights: 269 */ 270#define pte_wrprotect(pte) (__pte(pte_val(pte) & ~_PAGE_AR_RW)) |
| 271#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_AR_RW)) | 271#define pte_mkwrite_novma(pte) (__pte(pte_val(pte) | _PAGE_AR_RW)) |
| 272#define pte_mkold(pte) (__pte(pte_val(pte) & ~_PAGE_A)) 273#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A)) 274#define pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D)) 275#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D)) 276#define pte_mkhuge(pte) (__pte(pte_val(pte))) 277 278/* 279 * Because ia64's Icache and Dcache is not coherent (on a cpu), we need to --- 266 unchanged lines hidden --- | 272#define pte_mkold(pte) (__pte(pte_val(pte) & ~_PAGE_A)) 273#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A)) 274#define pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D)) 275#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D)) 276#define pte_mkhuge(pte) (__pte(pte_val(pte))) 277 278/* 279 * Because ia64's Icache and Dcache is not coherent (on a cpu), we need to --- 266 unchanged lines hidden --- |