cachev2.c (3eb66e91a25497065c5322b1268cbc3953642227) cachev2.c (ae76f635d4e1cffa6870cc5472567ca9d6940a22)
1// SPDX-License-Identifier: GPL-2.0
2// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
3
4#include <linux/spinlock.h>
5#include <linux/smp.h>
6#include <asm/cache.h>
7#include <asm/barrier.h>
8

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64{
65 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
66
67 for (; i < end; i += L1_CACHE_BYTES)
68 asm volatile("dcache.civa %0\n"::"r"(i):"memory");
69 sync_is();
70}
71
1// SPDX-License-Identifier: GPL-2.0
2// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
3
4#include <linux/spinlock.h>
5#include <linux/smp.h>
6#include <asm/cache.h>
7#include <asm/barrier.h>
8

--- 55 unchanged lines hidden (view full) ---

64{
65 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
66
67 for (; i < end; i += L1_CACHE_BYTES)
68 asm volatile("dcache.civa %0\n"::"r"(i):"memory");
69 sync_is();
70}
71
72void dma_inv_range(unsigned long start, unsigned long end)
73{
74 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
75
76 for (; i < end; i += L1_CACHE_BYTES)
77 asm volatile("dcache.iva %0\n"::"r"(i):"memory");
78 sync_is();
79}
80
72void dma_wb_range(unsigned long start, unsigned long end)
73{
74 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
75
76 for (; i < end; i += L1_CACHE_BYTES)
81void dma_wb_range(unsigned long start, unsigned long end)
82{
83 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
84
85 for (; i < end; i += L1_CACHE_BYTES)
77 asm volatile("dcache.civa %0\n"::"r"(i):"memory");
86 asm volatile("dcache.cva %0\n"::"r"(i):"memory");
78 sync_is();
79}
87 sync_is();
88}