ckmmu.h (3eb66e91a25497065c5322b1268cbc3953642227) ckmmu.h (f62e31623d718a7c20d9da98de48361624d7360a)
1/* SPDX-License-Identifier: GPL-2.0 */
2// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
3
4#ifndef __ASM_CSKY_CKMMUV1_H
5#define __ASM_CSKY_CKMMUV1_H
6#include <abi/reg_ops.h>
7
8static inline int read_mmu_index(void)

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35 return cprcr("cpcr4");
36}
37
38static inline void write_mmu_entryhi(int value)
39{
40 cpwcr("cpcr4", value);
41}
42
1/* SPDX-License-Identifier: GPL-2.0 */
2// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
3
4#ifndef __ASM_CSKY_CKMMUV1_H
5#define __ASM_CSKY_CKMMUV1_H
6#include <abi/reg_ops.h>
7
8static inline int read_mmu_index(void)

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35 return cprcr("cpcr4");
36}
37
38static inline void write_mmu_entryhi(int value)
39{
40 cpwcr("cpcr4", value);
41}
42
43static inline unsigned long read_mmu_msa0(void)
44{
45 return cprcr("cpcr30");
46}
47
48static inline void write_mmu_msa0(unsigned long value)
49{
50 cpwcr("cpcr30", value);
51}
52
53static inline unsigned long read_mmu_msa1(void)
54{
55 return cprcr("cpcr31");
56}
57
58static inline void write_mmu_msa1(unsigned long value)
59{
60 cpwcr("cpcr31", value);
61}
62
43/*
44 * TLB operations.
45 */
46static inline void tlb_probe(void)
47{
48 cpwcr("cpcr8", 0x80000000);
49}
50

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63/*
64 * TLB operations.
65 */
66static inline void tlb_probe(void)
67{
68 cpwcr("cpcr8", 0x80000000);
69}
70

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