switch.c (6e2b347d42e54282e4c6cfa08272db462b178f7f) switch.c (e9ada6c208c15c907afe5afb1aa82e23e81eb8ba)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2015 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 */
6
7#include <hyp/switch.h>
8

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50 * except for some missing controls, such as TAM.
51 * In this case, CPTR_EL2.TAM has the same position with or without
52 * VHE (HCR.E2H == 1) which allows us to use here the CPTR_EL2.TAM
53 * shift value for trapping the AMU accesses.
54 */
55
56 val |= CPTR_EL2_TAM;
57
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2015 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 */
6
7#include <hyp/switch.h>
8

--- 41 unchanged lines hidden (view full) ---

50 * except for some missing controls, such as TAM.
51 * In this case, CPTR_EL2.TAM has the same position with or without
52 * VHE (HCR.E2H == 1) which allows us to use here the CPTR_EL2.TAM
53 * shift value for trapping the AMU accesses.
54 */
55
56 val |= CPTR_EL2_TAM;
57
58 if (update_fp_enabled(vcpu)) {
58 if (guest_owns_fp_regs(vcpu)) {
59 if (vcpu_has_sve(vcpu))
60 val |= CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN;
61 } else {
62 val &= ~(CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN);
63 __activate_traps_fpsimd32(vcpu);
64 }
65
66 if (cpus_have_final_cap(ARM64_SME))

--- 187 unchanged lines hidden --- 		59 if (vcpu_has_sve(vcpu))
60 val |= CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN;
61 } else {
62 val &= ~(CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN);
63 __activate_traps_fpsimd32(vcpu);
64 }
65
66 if (cpus_have_final_cap(ARM64_SME))

--- 187 unchanged lines hidden ---