entry.S (c139e1425ff7bec7ac22ed90acbadb1b7aa091a9) entry.S (ee6214cec7818867f368c35843ea1f3dffcbb57c)
1/*
2 * Low-level exception handling code
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Authors: Catalin Marinas <catalin.marinas@arm.com>
6 * Will Deacon <will.deacon@arm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify

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283 * Undefined instruction
284 */
285 mov x0, sp
286 b do_undefinstr
287el1_dbg:
288 /*
289 * Debug exception handling
290 */
1/*
2 * Low-level exception handling code
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Authors: Catalin Marinas <catalin.marinas@arm.com>
6 * Will Deacon <will.deacon@arm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify

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283 * Undefined instruction
284 */
285 mov x0, sp
286 b do_undefinstr
287el1_dbg:
288 /*
289 * Debug exception handling
290 */
291 cmp x24, #ESR_EL1_EC_BRK64 // if BRK64
292 cinc x24, x24, eq // set bit '0'
291 tbz x24, #0, el1_inv // EL1 only
292 mrs x0, far_el1
293 mov x2, sp // struct pt_regs
294 bl do_debug_exception
295
296 kernel_exit 1
297el1_inv:
298 // TODO: add support for undefined instructions in kernel mode

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293 tbz x24, #0, el1_inv // EL1 only
294 mrs x0, far_el1
295 mov x2, sp // struct pt_regs
296 bl do_debug_exception
297
298 kernel_exit 1
299el1_inv:
300 // TODO: add support for undefined instructions in kernel mode

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