acpi.c (819a88263d5dbe398edd59cc1cf725ed1fdcfd79) | acpi.c (0f0783365cbb7ec13a8f02198f6e1a146d94a5a9) |
---|---|
1/* 2 * ARM64 Specific Low-Level ACPI Boot Support 3 * 4 * Copyright (C) 2013-2014, Linaro Ltd. 5 * Author: Al Stone <al.stone@linaro.org> 6 * Author: Graeme Gregory <graeme.gregory@linaro.org> 7 * Author: Hanjun Guo <hanjun.guo@linaro.org> 8 * Author: Tomasz Nowicki <tomasz.nowicki@linaro.org> --- 22 unchanged lines hidden (view full) --- 31 32int acpi_noirq = 1; /* skip ACPI IRQ initialization */ 33int acpi_disabled = 1; 34EXPORT_SYMBOL(acpi_disabled); 35 36int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ 37EXPORT_SYMBOL(acpi_pci_disabled); 38 | 1/* 2 * ARM64 Specific Low-Level ACPI Boot Support 3 * 4 * Copyright (C) 2013-2014, Linaro Ltd. 5 * Author: Al Stone <al.stone@linaro.org> 6 * Author: Graeme Gregory <graeme.gregory@linaro.org> 7 * Author: Hanjun Guo <hanjun.guo@linaro.org> 8 * Author: Tomasz Nowicki <tomasz.nowicki@linaro.org> --- 22 unchanged lines hidden (view full) --- 31 32int acpi_noirq = 1; /* skip ACPI IRQ initialization */ 33int acpi_disabled = 1; 34EXPORT_SYMBOL(acpi_disabled); 35 36int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ 37EXPORT_SYMBOL(acpi_pci_disabled); 38 |
39/* Processors with enabled flag and sane MPIDR */ 40static int enabled_cpus; 41 42/* Boot CPU is valid or not in MADT */ 43static bool bootcpu_valid __initdata; 44 | |
45static bool param_acpi_off __initdata; 46static bool param_acpi_force __initdata; 47 48static int __init parse_acpi(char *arg) 49{ 50 if (!arg) 51 return -EINVAL; 52 --- 37 unchanged lines hidden (view full) --- 90void __init __acpi_unmap_table(char *map, unsigned long size) 91{ 92 if (!map || !size) 93 return; 94 95 early_memunmap(map, size); 96} 97 | 39static bool param_acpi_off __initdata; 40static bool param_acpi_force __initdata; 41 42static int __init parse_acpi(char *arg) 43{ 44 if (!arg) 45 return -EINVAL; 46 --- 37 unchanged lines hidden (view full) --- 84void __init __acpi_unmap_table(char *map, unsigned long size) 85{ 86 if (!map || !size) 87 return; 88 89 early_memunmap(map, size); 90} 91 |
98/** 99 * acpi_map_gic_cpu_interface - generates a logical cpu number 100 * and map to MPIDR represented by GICC structure 101 */ 102static void __init 103acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) 104{ 105 int i; 106 u64 mpidr = processor->arm_mpidr & MPIDR_HWID_BITMASK; 107 bool enabled = !!(processor->flags & ACPI_MADT_ENABLED); 108 109 if (mpidr == INVALID_HWID) { 110 pr_info("Skip MADT cpu entry with invalid MPIDR\n"); 111 return; 112 } 113 114 total_cpus++; 115 if (!enabled) 116 return; 117 118 if (enabled_cpus >= NR_CPUS) { 119 pr_warn("NR_CPUS limit of %d reached, Processor %d/0x%llx ignored.\n", 120 NR_CPUS, total_cpus, mpidr); 121 return; 122 } 123 124 /* Check if GICC structure of boot CPU is available in the MADT */ 125 if (cpu_logical_map(0) == mpidr) { 126 if (bootcpu_valid) { 127 pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n", 128 mpidr); 129 return; 130 } 131 132 bootcpu_valid = true; 133 } 134 135 /* 136 * Duplicate MPIDRs are a recipe for disaster. Scan 137 * all initialized entries and check for 138 * duplicates. If any is found just ignore the CPU. 139 */ 140 for (i = 1; i < enabled_cpus; i++) { 141 if (cpu_logical_map(i) == mpidr) { 142 pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n", 143 mpidr); 144 return; 145 } 146 } 147 148 if (!acpi_psci_present()) 149 return; 150 151 cpu_ops[enabled_cpus] = cpu_get_ops("psci"); 152 /* CPU 0 was already initialized */ 153 if (enabled_cpus) { 154 if (!cpu_ops[enabled_cpus]) 155 return; 156 157 if (cpu_ops[enabled_cpus]->cpu_init(enabled_cpus)) 158 return; 159 160 /* map the logical cpu id to cpu MPIDR */ 161 cpu_logical_map(enabled_cpus) = mpidr; 162 } 163 164 enabled_cpus++; 165} 166 167static int __init 168acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header, 169 const unsigned long end) 170{ 171 struct acpi_madt_generic_interrupt *processor; 172 173 processor = (struct acpi_madt_generic_interrupt *)header; 174 175 if (BAD_MADT_ENTRY(processor, end)) 176 return -EINVAL; 177 178 acpi_table_print_madt_entry(header); 179 acpi_map_gic_cpu_interface(processor); 180 return 0; 181} 182 183/* Parse GIC cpu interface entries in MADT for SMP init */ 184void __init acpi_init_cpus(void) 185{ 186 int count, i; 187 188 /* 189 * do a partial walk of MADT to determine how many CPUs 190 * we have including disabled CPUs, and get information 191 * we need for SMP init 192 */ 193 count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, 194 acpi_parse_gic_cpu_interface, 0); 195 196 if (!count) { 197 pr_err("No GIC CPU interface entries present\n"); 198 return; 199 } else if (count < 0) { 200 pr_err("Error parsing GIC CPU interface entry\n"); 201 return; 202 } 203 204 if (!bootcpu_valid) { 205 pr_err("MADT missing boot CPU MPIDR, not enabling secondaries\n"); 206 return; 207 } 208 209 for (i = 0; i < enabled_cpus; i++) 210 set_cpu_possible(i, true); 211 212 /* Make boot-up look pretty */ 213 pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus); 214} 215 | |
216/* 217 * acpi_fadt_sanity_check() - Check FADT presence and carry out sanity 218 * checks on it 219 * 220 * Return 0 on success, <0 on failure 221 */ 222static int __init acpi_fadt_sanity_check(void) 223{ --- 122 unchanged lines hidden --- | 92/* 93 * acpi_fadt_sanity_check() - Check FADT presence and carry out sanity 94 * checks on it 95 * 96 * Return 0 on success, <0 on failure 97 */ 98static int __init acpi_fadt_sanity_check(void) 99{ --- 122 unchanged lines hidden --- |