r8a77961.dtsi (ca31fef11dc83e672415d5925a134749761329bd) r8a77961.dtsi (651f8cffade8615bb4fce1ecb3a929892c5e60d7)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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953 "ch8", "ch9", "ch10", "ch11",
954 "ch12", "ch13", "ch14", "ch15";
955 clocks = <&cpg CPG_MOD 219>;
956 clock-names = "fck";
957 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
958 resets = <&cpg 219>;
959 #dma-cells = <1>;
960 dma-channels = <16>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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953 "ch8", "ch9", "ch10", "ch11",
954 "ch12", "ch13", "ch14", "ch15";
955 clocks = <&cpg CPG_MOD 219>;
956 clock-names = "fck";
957 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
958 resets = <&cpg 219>;
959 #dma-cells = <1>;
960 dma-channels = <16>;
961 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
962 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
963 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
964 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
965 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
966 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
967 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
968 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
961 };
962
963 dmac1: dma-controller@e7300000 {
964 compatible = "renesas,dmac-r8a77961",
965 "renesas,rcar-dmac";
966 reg = <0 0xe7300000 0 0x10000>;
967 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,

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987 "ch8", "ch9", "ch10", "ch11",
988 "ch12", "ch13", "ch14", "ch15";
989 clocks = <&cpg CPG_MOD 218>;
990 clock-names = "fck";
991 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
992 resets = <&cpg 218>;
993 #dma-cells = <1>;
994 dma-channels = <16>;
969 };
970
971 dmac1: dma-controller@e7300000 {
972 compatible = "renesas,dmac-r8a77961",
973 "renesas,rcar-dmac";
974 reg = <0 0xe7300000 0 0x10000>;
975 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,

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995 "ch8", "ch9", "ch10", "ch11",
996 "ch12", "ch13", "ch14", "ch15";
997 clocks = <&cpg CPG_MOD 218>;
998 clock-names = "fck";
999 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1000 resets = <&cpg 218>;
1001 #dma-cells = <1>;
1002 dma-channels = <16>;
1003 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1004 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1005 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1006 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1007 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1008 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1009 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1010 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
995 };
996
997 dmac2: dma-controller@e7310000 {
998 compatible = "renesas,dmac-r8a77961",
999 "renesas,rcar-dmac";
1000 reg = <0 0xe7310000 0 0x10000>;
1001 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1002 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,

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1021 "ch8", "ch9", "ch10", "ch11",
1022 "ch12", "ch13", "ch14", "ch15";
1023 clocks = <&cpg CPG_MOD 217>;
1024 clock-names = "fck";
1025 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1026 resets = <&cpg 217>;
1027 #dma-cells = <1>;
1028 dma-channels = <16>;
1011 };
1012
1013 dmac2: dma-controller@e7310000 {
1014 compatible = "renesas,dmac-r8a77961",
1015 "renesas,rcar-dmac";
1016 reg = <0 0xe7310000 0 0x10000>;
1017 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,

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1037 "ch8", "ch9", "ch10", "ch11",
1038 "ch12", "ch13", "ch14", "ch15";
1039 clocks = <&cpg CPG_MOD 217>;
1040 clock-names = "fck";
1041 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1042 resets = <&cpg 217>;
1043 #dma-cells = <1>;
1044 dma-channels = <16>;
1045 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1046 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1047 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1048 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1049 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1050 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1051 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1052 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1029 };
1030
1031 ipmmu_ds0: iommu@e6740000 {
1032 compatible = "renesas,ipmmu-r8a77961";
1033 reg = <0 0xe6740000 0 0x1000>;
1034 renesas,ipmmu-main = <&ipmmu_mm 0>;
1035 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1036 #iommu-cells = <1>;

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1155 "ch24";
1156 clocks = <&cpg CPG_MOD 812>;
1157 clock-names = "fck";
1158 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1159 resets = <&cpg 812>;
1160 phy-mode = "rgmii";
1161 rx-internal-delay-ps = <0>;
1162 tx-internal-delay-ps = <0>;
1053 };
1054
1055 ipmmu_ds0: iommu@e6740000 {
1056 compatible = "renesas,ipmmu-r8a77961";
1057 reg = <0 0xe6740000 0 0x1000>;
1058 renesas,ipmmu-main = <&ipmmu_mm 0>;
1059 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1060 #iommu-cells = <1>;

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1179 "ch24";
1180 clocks = <&cpg CPG_MOD 812>;
1181 clock-names = "fck";
1182 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1183 resets = <&cpg 812>;
1184 phy-mode = "rgmii";
1185 rx-internal-delay-ps = <0>;
1186 tx-internal-delay-ps = <0>;
1187 iommus = <&ipmmu_ds0 16>;
1163 #address-cells = <1>;
1164 #size-cells = <0>;
1165 status = "disabled";
1166 };
1167
1168 can0: can@e6c30000 {
1169 compatible = "renesas,can-r8a77961",
1170 "renesas,rcar-gen3-can";

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2275 compatible = "renesas,sdhi-r8a77961",
2276 "renesas,rcar-gen3-sdhi";
2277 reg = <0 0xee100000 0 0x2000>;
2278 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2279 clocks = <&cpg CPG_MOD 314>;
2280 max-frequency = <200000000>;
2281 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2282 resets = <&cpg 314>;
1188 #address-cells = <1>;
1189 #size-cells = <0>;
1190 status = "disabled";
1191 };
1192
1193 can0: can@e6c30000 {
1194 compatible = "renesas,can-r8a77961",
1195 "renesas,rcar-gen3-can";

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2300 compatible = "renesas,sdhi-r8a77961",
2301 "renesas,rcar-gen3-sdhi";
2302 reg = <0 0xee100000 0 0x2000>;
2303 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2304 clocks = <&cpg CPG_MOD 314>;
2305 max-frequency = <200000000>;
2306 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2307 resets = <&cpg 314>;
2308 iommus = <&ipmmu_ds1 32>;
2283 status = "disabled";
2284 };
2285
2286 sdhi1: mmc@ee120000 {
2287 compatible = "renesas,sdhi-r8a77961",
2288 "renesas,rcar-gen3-sdhi";
2289 reg = <0 0xee120000 0 0x2000>;
2290 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2291 clocks = <&cpg CPG_MOD 313>;
2292 max-frequency = <200000000>;
2293 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2294 resets = <&cpg 313>;
2309 status = "disabled";
2310 };
2311
2312 sdhi1: mmc@ee120000 {
2313 compatible = "renesas,sdhi-r8a77961",
2314 "renesas,rcar-gen3-sdhi";
2315 reg = <0 0xee120000 0 0x2000>;
2316 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MOD 313>;
2318 max-frequency = <200000000>;
2319 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2320 resets = <&cpg 313>;
2321 iommus = <&ipmmu_ds1 33>;
2295 status = "disabled";
2296 };
2297
2298 sdhi2: mmc@ee140000 {
2299 compatible = "renesas,sdhi-r8a77961",
2300 "renesas,rcar-gen3-sdhi";
2301 reg = <0 0xee140000 0 0x2000>;
2302 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2303 clocks = <&cpg CPG_MOD 312>;
2304 max-frequency = <200000000>;
2305 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2306 resets = <&cpg 312>;
2322 status = "disabled";
2323 };
2324
2325 sdhi2: mmc@ee140000 {
2326 compatible = "renesas,sdhi-r8a77961",
2327 "renesas,rcar-gen3-sdhi";
2328 reg = <0 0xee140000 0 0x2000>;
2329 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2330 clocks = <&cpg CPG_MOD 312>;
2331 max-frequency = <200000000>;
2332 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2333 resets = <&cpg 312>;
2334 iommus = <&ipmmu_ds1 34>;
2307 status = "disabled";
2308 };
2309
2310 sdhi3: mmc@ee160000 {
2311 compatible = "renesas,sdhi-r8a77961",
2312 "renesas,rcar-gen3-sdhi";
2313 reg = <0 0xee160000 0 0x2000>;
2314 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2315 clocks = <&cpg CPG_MOD 311>;
2316 max-frequency = <200000000>;
2317 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2318 resets = <&cpg 311>;
2335 status = "disabled";
2336 };
2337
2338 sdhi3: mmc@ee160000 {
2339 compatible = "renesas,sdhi-r8a77961",
2340 "renesas,rcar-gen3-sdhi";
2341 reg = <0 0xee160000 0 0x2000>;
2342 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2343 clocks = <&cpg CPG_MOD 311>;
2344 max-frequency = <200000000>;
2345 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2346 resets = <&cpg 311>;
2347 iommus = <&ipmmu_ds1 35>;
2319 status = "disabled";
2320 };
2321
2322 gic: interrupt-controller@f1010000 {
2323 compatible = "arm,gic-400";
2324 #interrupt-cells = <3>;
2325 #address-cells = <0>;
2326 interrupt-controller;

--- 451 unchanged lines hidden --- 		2348 status = "disabled";
2349 };
2350
2351 gic: interrupt-controller@f1010000 {
2352 compatible = "arm,gic-400";
2353 #interrupt-cells = <3>;
2354 #address-cells = <0>;
2355 interrupt-controller;

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