sc8180x.dtsi (9e1951a814558fc37d6cd8ca2c21927e1ca6e6b6) sc8180x.dtsi (7553301a2ae956d06329ce04d52dbdbfdc4c68ec)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
5 */
6
7#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8#include <dt-bindings/clock/qcom,gcc-sc8180x.h>

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2555 reg = <0 0x09680000 0 0x58200>;
2556 #interconnect-cells = <2>;
2557 qcom,bcm-voters = <&apps_bcm_voter>;
2558 };
2559
2560 usb_prim: usb@a6f8800 {
2561 compatible = "qcom,sc8180x-dwc3", "qcom,dwc3";
2562 reg = <0 0x0a6f8800 0 0x400>;
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
5 */
6
7#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8#include <dt-bindings/clock/qcom,gcc-sc8180x.h>

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2555 reg = <0 0x09680000 0 0x58200>;
2556 #interconnect-cells = <2>;
2557 qcom,bcm-voters = <&apps_bcm_voter>;
2558 };
2559
2560 usb_prim: usb@a6f8800 {
2561 compatible = "qcom,sc8180x-dwc3", "qcom,dwc3";
2562 reg = <0 0x0a6f8800 0 0x400>;
2563 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
2564 <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
2565 <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
2566 <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
2563 interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
2564 <&intc GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
2565 <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
2566 <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
2567 interrupt-names = "hs_phy_irq",
2568 "ss_phy_irq",
2569 "dm_hs_phy_irq",
2570 "dp_hs_phy_irq";
2571
2572 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
2573 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
2574 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,

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2629 clock-names = "cfg_noc",
2630 "core",
2631 "iface",
2632 "mock_utmi",
2633 "sleep",
2634 "xo";
2635 resets = <&gcc GCC_USB30_SEC_BCR>;
2636 power-domains = <&gcc USB30_SEC_GDSC>;
2567 interrupt-names = "hs_phy_irq",
2568 "ss_phy_irq",
2569 "dm_hs_phy_irq",
2570 "dp_hs_phy_irq";
2571
2572 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
2573 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
2574 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,

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2629 clock-names = "cfg_noc",
2630 "core",
2631 "iface",
2632 "mock_utmi",
2633 "sleep",
2634 "xo";
2635 resets = <&gcc GCC_USB30_SEC_BCR>;
2636 power-domains = <&gcc USB30_SEC_GDSC>;
2637 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
2638 <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
2639 <GIC_SPI 490 IRQ_TYPE_EDGE_BOTH>,
2640 <GIC_SPI 491 IRQ_TYPE_EDGE_BOTH>;
2637 interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
2638 <&intc GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
2639 <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
2640 <&pdc 11 IRQ_TYPE_EDGE_BOTH>;
2641 interrupt-names = "hs_phy_irq", "ss_phy_irq",
2642 "dm_hs_phy_irq", "dp_hs_phy_irq";
2643
2644 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
2645 <&gcc GCC_USB30_SEC_MASTER_CLK>;
2646 assigned-clock-rates = <19200000>, <200000000>;
2647
2648 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,

--- 1402 unchanged lines hidden --- 		2641 interrupt-names = "hs_phy_irq", "ss_phy_irq",
2642 "dm_hs_phy_irq", "dp_hs_phy_irq";
2643
2644 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
2645 <&gcc GCC_USB30_SEC_MASTER_CLK>;
2646 assigned-clock-rates = <19200000>, <200000000>;
2647
2648 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,

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