sc8180x.dtsi (494dec9b6f541451b2e82905b0eebd9a4ac9848b) sc8180x.dtsi (e537d5ef47097360d8df524c748f3df451383dcd)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
5 */
6
7#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8#include <dt-bindings/clock/qcom,gcc-sc8180x.h>

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2305 "gcc_gpu_gpll0_clk_src",
2306 "gcc_gpu_gpll0_div_clk_src";
2307 #clock-cells = <1>;
2308 #reset-cells = <1>;
2309 #power-domain-cells = <1>;
2310 };
2311
2312 adreno_smmu: iommu@2ca0000 {
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
5 */
6
7#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8#include <dt-bindings/clock/qcom,gcc-sc8180x.h>

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2305 "gcc_gpu_gpll0_clk_src",
2306 "gcc_gpu_gpll0_div_clk_src";
2307 #clock-cells = <1>;
2308 #reset-cells = <1>;
2309 #power-domain-cells = <1>;
2310 };
2311
2312 adreno_smmu: iommu@2ca0000 {
2313 compatible = "qcom,sc8180x-smmu-500", "arm,mmu-500";
2313 compatible = "qcom,sc8180x-smmu-500", "qcom,adreno-smmu",
2314 "qcom,smmu-500", "arm,mmu-500";
2314 reg = <0 0x02ca0000 0 0x10000>;
2315 #iommu-cells = <2>;
2316 #global-interrupts = <1>;
2317 interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>,
2318 <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
2319 <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
2320 <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
2321 <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,

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2315 reg = <0 0x02ca0000 0 0x10000>;
2316 #iommu-cells = <2>;
2317 #global-interrupts = <1>;
2318 interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>,
2319 <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
2320 <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
2321 <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
2322 <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,

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