pm660.dtsi (50501936288d6a29d7ef78f25d00e33240fad45f) | pm660.dtsi (41c1855232ed277e74daedbecac8d328b6c2ceb8) |
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1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020, Konrad Dybcio 4 */ 5 6#include <dt-bindings/iio/qcom,spmi-vadc.h> 7#include <dt-bindings/input/linux-event-codes.h> 8#include <dt-bindings/interrupt-controller/irq.h> --- 77 unchanged lines hidden (view full) --- 86 pm660_adc: adc@3100 { 87 compatible = "qcom,spmi-adc-rev2"; 88 reg = <0x3100>; 89 interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; 90 #address-cells = <1>; 91 #size-cells = <0>; 92 #io-channel-cells = <1>; 93 | 1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020, Konrad Dybcio 4 */ 5 6#include <dt-bindings/iio/qcom,spmi-vadc.h> 7#include <dt-bindings/input/linux-event-codes.h> 8#include <dt-bindings/interrupt-controller/irq.h> --- 77 unchanged lines hidden (view full) --- 86 pm660_adc: adc@3100 { 87 compatible = "qcom,spmi-adc-rev2"; 88 reg = <0x3100>; 89 interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; 90 #address-cells = <1>; 91 #size-cells = <0>; 92 #io-channel-cells = <1>; 93 |
94 ref_gnd: ref_gnd@0 { | 94 channel@0 { |
95 reg = <ADC5_REF_GND>; 96 qcom,decimation = <1024>; 97 qcom,pre-scaling = <1 1>; | 95 reg = <ADC5_REF_GND>; 96 qcom,decimation = <1024>; 97 qcom,pre-scaling = <1 1>; |
98 label = "ref_gnd"; |
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98 }; 99 | 99 }; 100 |
100 vref_1p25: vref_1p25@1 { | 101 channel@1 { |
101 reg = <ADC5_1P25VREF>; 102 qcom,decimation = <1024>; 103 qcom,pre-scaling = <1 1>; | 102 reg = <ADC5_1P25VREF>; 103 qcom,decimation = <1024>; 104 qcom,pre-scaling = <1 1>; |
105 label = "vref_1p25"; |
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104 }; 105 | 106 }; 107 |
106 die_temp: die_temp@6 { | 108 channel@6 { |
107 reg = <ADC5_DIE_TEMP>; 108 qcom,decimation = <1024>; 109 qcom,pre-scaling = <1 1>; | 109 reg = <ADC5_DIE_TEMP>; 110 qcom,decimation = <1024>; 111 qcom,pre-scaling = <1 1>; |
112 label = "die_temp"; |
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110 }; 111 | 113 }; 114 |
112 xo_therm: xo_therm@4c { | 115 channel@4c { |
113 reg = <ADC5_XO_THERM_100K_PU>; 114 qcom,pre-scaling = <1 1>; 115 qcom,decimation = <1024>; 116 qcom,hw-settle-time = <200>; 117 qcom,ratiometric; | 116 reg = <ADC5_XO_THERM_100K_PU>; 117 qcom,pre-scaling = <1 1>; 118 qcom,decimation = <1024>; 119 qcom,hw-settle-time = <200>; 120 qcom,ratiometric; |
121 label = "xo_therm"; |
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118 }; 119 | 122 }; 123 |
120 msm_therm: msm_therm@4d { | 124 channel@4d { |
121 reg = <ADC5_AMUX_THM1_100K_PU>; 122 qcom,pre-scaling = <1 1>; 123 qcom,decimation = <1024>; 124 qcom,hw-settle-time = <200>; 125 qcom,ratiometric; | 125 reg = <ADC5_AMUX_THM1_100K_PU>; 126 qcom,pre-scaling = <1 1>; 127 qcom,decimation = <1024>; 128 qcom,hw-settle-time = <200>; 129 qcom,ratiometric; |
130 label = "msm_therm"; |
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126 }; 127 | 131 }; 132 |
128 emmc_therm: emmc_therm@4e { | 133 channel@4e { |
129 reg = <ADC5_AMUX_THM2_100K_PU>; 130 qcom,pre-scaling = <1 1>; 131 qcom,decimation = <1024>; 132 qcom,hw-settle-time = <200>; 133 qcom,ratiometric; | 134 reg = <ADC5_AMUX_THM2_100K_PU>; 135 qcom,pre-scaling = <1 1>; 136 qcom,decimation = <1024>; 137 qcom,hw-settle-time = <200>; 138 qcom,ratiometric; |
139 label = "emmc_therm"; |
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134 }; 135 | 140 }; 141 |
136 pa_therm0: thermistor0@4f { | 142 channel@4f { |
137 reg = <ADC5_AMUX_THM3_100K_PU>; 138 qcom,pre-scaling = <1 1>; 139 qcom,decimation = <1024>; 140 qcom,hw-settle-time = <200>; 141 qcom,ratiometric; | 143 reg = <ADC5_AMUX_THM3_100K_PU>; 144 qcom,pre-scaling = <1 1>; 145 qcom,decimation = <1024>; 146 qcom,hw-settle-time = <200>; 147 qcom,ratiometric; |
148 label = "pa_therm0"; |
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142 }; 143 | 149 }; 150 |
144 pa_therm1: thermistor1@50 { | 151 channel@50 { |
145 reg = <ADC5_AMUX_THM4_100K_PU>; 146 qcom,pre-scaling = <1 1>; 147 qcom,decimation = <1024>; 148 qcom,hw-settle-time = <200>; 149 qcom,ratiometric; | 152 reg = <ADC5_AMUX_THM4_100K_PU>; 153 qcom,pre-scaling = <1 1>; 154 qcom,decimation = <1024>; 155 qcom,hw-settle-time = <200>; 156 qcom,ratiometric; |
157 label = "pa_therm1"; |
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150 }; 151 | 158 }; 159 |
152 quiet_therm: quiet_therm@51 { | 160 channel@51 { |
153 reg = <ADC5_AMUX_THM5_100K_PU>; 154 qcom,pre-scaling = <1 1>; 155 qcom,decimation = <1024>; 156 qcom,hw-settle-time = <200>; 157 qcom,ratiometric; | 161 reg = <ADC5_AMUX_THM5_100K_PU>; 162 qcom,pre-scaling = <1 1>; 163 qcom,decimation = <1024>; 164 qcom,hw-settle-time = <200>; 165 qcom,ratiometric; |
166 label = "quiet_therm"; |
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158 }; 159 | 167 }; 168 |
160 vadc_vph_pwr: vph_pwr@83 { | 169 channel@83 { |
161 reg = <ADC5_VPH_PWR>; 162 qcom,decimation = <1024>; 163 qcom,pre-scaling = <1 3>; | 170 reg = <ADC5_VPH_PWR>; 171 qcom,decimation = <1024>; 172 qcom,pre-scaling = <1 3>; |
173 label = "vph_pwr"; |
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164 }; 165 | 174 }; 175 |
166 vcoin: vcoin@85 { | 176 channel@85 { |
167 reg = <ADC5_VCOIN>; 168 qcom,decimation = <1024>; 169 qcom,pre-scaling = <1 3>; | 177 reg = <ADC5_VCOIN>; 178 qcom,decimation = <1024>; 179 qcom,pre-scaling = <1 3>; |
180 label = "vcoin"; |
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170 }; 171 }; 172 173 pm660_gpios: gpio@c000 { 174 compatible = "qcom,pm660-gpio", "qcom,spmi-gpio"; 175 reg = <0xc000>; 176 gpio-controller; 177 gpio-ranges = <&pm660_gpios 0 0 13>; --- 17 unchanged lines hidden --- | 181 }; 182 }; 183 184 pm660_gpios: gpio@c000 { 185 compatible = "qcom,pm660-gpio", "qcom,spmi-gpio"; 186 reg = <0xc000>; 187 gpio-controller; 188 gpio-ranges = <&pm660_gpios 0 0 13>; --- 17 unchanged lines hidden --- |