imx8mp.dtsi (ac4af2b12bbebd5d088726443e2cccac54e29c4f) imx8mp.dtsi (12fa1078efc871604d62e992cb8a038421b82096)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2019 NXP
4 */
5
6#include <dt-bindings/clock/imx8mp-clock.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>

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308 reg = <0x30330000 0x10000>;
309 };
310
311 gpr: iomuxc-gpr@30340000 {
312 compatible = "fsl,imx8mp-iomuxc-gpr", "syscon";
313 reg = <0x30340000 0x10000>;
314 };
315
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2019 NXP
4 */
5
6#include <dt-bindings/clock/imx8mp-clock.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>

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308 reg = <0x30330000 0x10000>;
309 };
310
311 gpr: iomuxc-gpr@30340000 {
312 compatible = "fsl,imx8mp-iomuxc-gpr", "syscon";
313 reg = <0x30340000 0x10000>;
314 };
315
316 ocotp: ocotp-ctrl@30350000 {
316 ocotp: efuse@30350000 {
317 compatible = "fsl,imx8mp-ocotp", "syscon";
318 reg = <0x30350000 0x10000>;
319 clocks = <&clk IMX8MP_CLK_OCOTP_ROOT>;
320 /* For nvmem subnodes */
321 #address-cells = <1>;
322 #size-cells = <1>;
323
324 cpu_speed_grade: speed-grade@10 {

--- 416 unchanged lines hidden --- 		317 compatible = "fsl,imx8mp-ocotp", "syscon";
318 reg = <0x30350000 0x10000>;
319 clocks = <&clk IMX8MP_CLK_OCOTP_ROOT>;
320 /* For nvmem subnodes */
321 #address-cells = <1>;
322 #size-cells = <1>;
323
324 cpu_speed_grade: speed-grade@10 {

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