imx8mn.dtsi (ca31fef11dc83e672415d5925a134749761329bd) imx8mn.dtsi (a758dee8ac50cdabc1229ca82bc7472752a51e1d)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2019 NXP
4 */
5
6#include <dt-bindings/clock/imx8mn-clock.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>

--- 909 unchanged lines hidden (view full) ---

918 clocks = <&clk IMX8MN_CLK_SDMA1_ROOT>,
919 <&clk IMX8MN_CLK_AHB>;
920 clock-names = "ipg", "ahb";
921 #dma-cells = <3>;
922 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
923 };
924
925 fec1: ethernet@30be0000 {
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2019 NXP
4 */
5
6#include <dt-bindings/clock/imx8mn-clock.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>

--- 909 unchanged lines hidden (view full) ---

918 clocks = <&clk IMX8MN_CLK_SDMA1_ROOT>,
919 <&clk IMX8MN_CLK_AHB>;
920 clock-names = "ipg", "ahb";
921 #dma-cells = <3>;
922 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
923 };
924
925 fec1: ethernet@30be0000 {
926 compatible = "fsl,imx8mn-fec", "fsl,imx6sx-fec";
926 compatible = "fsl,imx8mn-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
927 reg = <0x30be0000 0x10000>;
928 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
929 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
930 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
931 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
932 clocks = <&clk IMX8MN_CLK_ENET1_ROOT>,
933 <&clk IMX8MN_CLK_ENET1_ROOT>,
934 <&clk IMX8MN_CLK_ENET_TIMER>,

--- 114 unchanged lines hidden --- 		927 reg = <0x30be0000 0x10000>;
928 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
929 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
930 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
931 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
932 clocks = <&clk IMX8MN_CLK_ENET1_ROOT>,
933 <&clk IMX8MN_CLK_ENET1_ROOT>,
934 <&clk IMX8MN_CLK_ENET_TIMER>,

--- 114 unchanged lines hidden ---