proc-xsc3.S (40df2d1d8538865341a4cb9d4b7a375296517ad2) proc-xsc3.S (db5b7169474882fabbd811a4cf5c1bae3157e677)
1/*
2 * linux/arch/arm/mm/proc-xsc3.S
3 *
4 * Original Author: Matthew Gilbert
5 * Current Maintainer: Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * Copyright 2004 (C) Intel Corp.
8 * Copyright 2005 (C) MontaVista Software, Inc.

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355 .long 0x00 @ unused
356 .long 0x00 @ L_PTE_MT_MINICACHE (not present)
357 .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC (not present?)
358 .long 0x00 @ unused
359 .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC
360 .long 0x00 @ unused
361 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
362 .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED
1/*
2 * linux/arch/arm/mm/proc-xsc3.S
3 *
4 * Original Author: Matthew Gilbert
5 * Current Maintainer: Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * Copyright 2004 (C) Intel Corp.
8 * Copyright 2005 (C) MontaVista Software, Inc.

--- 346 unchanged lines hidden (view full) ---

355 .long 0x00 @ unused
356 .long 0x00 @ L_PTE_MT_MINICACHE (not present)
357 .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC (not present?)
358 .long 0x00 @ unused
359 .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC
360 .long 0x00 @ unused
361 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
362 .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED
363 .long 0x00 @ L_PTE_MT_DEV_IXP2000 (not present)
364 .long 0x00 @ unused
365 .long 0x00 @ unused
363 .long 0x00 @ unused
364 .long 0x00 @ unused
365 .long 0x00 @ unused
366
367 .align 5
368ENTRY(cpu_xsc3_set_pte_ext)
369 xscale_set_pte_ext_prologue
370
371 tst r1, #L_PTE_SHARED @ shared?
372 and r1, r1, #L_PTE_MT_MASK
373 adr ip, cpu_xsc3_mt_table

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366
367 .align 5
368ENTRY(cpu_xsc3_set_pte_ext)
369 xscale_set_pte_ext_prologue
370
371 tst r1, #L_PTE_SHARED @ shared?
372 and r1, r1, #L_PTE_MT_MASK
373 adr ip, cpu_xsc3_mt_table

--- 110 unchanged lines hidden ---