mmu.c (e6aa0f07cb5e81a7cbeaf3be6e2101234c2f0d30) mmu.c (eca73214c9c50e290b8dc823b41730b01788872d)
1/*
2 * linux/arch/arm/mm/mmu.c
3 *
4 * Copyright (C) 1995-2005 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/init.h>
14#include <linux/bootmem.h>
15#include <linux/mman.h>
16#include <linux/nodemask.h>
17
1/*
2 * linux/arch/arm/mm/mmu.c
3 *
4 * Copyright (C) 1995-2005 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/init.h>
14#include <linux/bootmem.h>
15#include <linux/mman.h>
16#include <linux/nodemask.h>
17
18#include <asm/cputype.h>
18#include <asm/mach-types.h>
19#include <asm/setup.h>
20#include <asm/sizes.h>
21#include <asm/tlb.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25
26#include "mm.h"
27
28DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
29
19#include <asm/mach-types.h>
20#include <asm/setup.h>
21#include <asm/sizes.h>
22#include <asm/tlb.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26
27#include "mm.h"
28
29DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
30
30extern void _stext, _etext, __data_start, _end;
31extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
32
33/*
34 * empty_zero_page is a special page that is used for
35 * zero-initialized data and COW.
36 */
37struct page *empty_zero_page;
38EXPORT_SYMBOL(empty_zero_page);
39
40/*

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206 },
207 [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */
208 .prot_pte = PROT_PTE_DEVICE,
209 .prot_l1 = PMD_TYPE_TABLE,
210 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE |
211 PMD_SECT_TEX(1),
212 .domain = DOMAIN_IO,
213 },
31/*
32 * empty_zero_page is a special page that is used for
33 * zero-initialized data and COW.
34 */
35struct page *empty_zero_page;
36EXPORT_SYMBOL(empty_zero_page);
37
38/*

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204 },
205 [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */
206 .prot_pte = PROT_PTE_DEVICE,
207 .prot_l1 = PMD_TYPE_TABLE,
208 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE |
209 PMD_SECT_TEX(1),
210 .domain = DOMAIN_IO,
211 },
214 [MT_DEVICE_WC] = { /* ioremap_wc */
215 .prot_pte = PROT_PTE_DEVICE,
216 .prot_l1 = PMD_TYPE_TABLE,
217 .prot_sect = PROT_SECT_DEVICE,
218 .domain = DOMAIN_IO,
219 },
220 [MT_CACHECLEAN] = {
221 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
222 .domain = DOMAIN_KERNEL,
223 },
224 [MT_MINICLEAN] = {
225 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE,
226 .domain = DOMAIN_KERNEL,
227 },

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274 }
275 if (cpu_arch < CPU_ARCH_ARMv5) {
276 if (cachepolicy >= CPOLICY_WRITEALLOC)
277 cachepolicy = CPOLICY_WRITEBACK;
278 ecc_mask = 0;
279 }
280
281 /*
212 [MT_CACHECLEAN] = {
213 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
214 .domain = DOMAIN_KERNEL,
215 },
216 [MT_MINICLEAN] = {
217 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE,
218 .domain = DOMAIN_KERNEL,
219 },

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266 }
267 if (cpu_arch < CPU_ARCH_ARMv5) {
268 if (cachepolicy >= CPOLICY_WRITEALLOC)
269 cachepolicy = CPOLICY_WRITEBACK;
270 ecc_mask = 0;
271 }
272
273 /*
282 * On non-Xscale3 ARMv5-and-older systems, use CB=01
283 * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3
284 * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable
285 * in xsc3 parlance, Uncached Normal in ARMv6 parlance).
286 */
287 if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
288 mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1);
289 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
290 } else {
291 mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE;
292 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
293 }
294
295 /*
296 * ARMv5 and lower, bit 4 must be set for page tables.
297 * (was: cache "update-able on write" bit on ARM610)
298 * However, Xscale cores require this bit to be cleared.
299 */
300 if (cpu_is_xscale()) {
301 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
302 mem_types[i].prot_sect &= ~PMD_BIT4;
303 mem_types[i].prot_l1 &= ~PMD_BIT4;

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586
587 for (i = 0; i < nr; i++)
588 create_mapping(io_desc + i);
589}
590
591static int __init check_membank_valid(struct membank *mb)
592{
593 /*
274 * ARMv5 and lower, bit 4 must be set for page tables.
275 * (was: cache "update-able on write" bit on ARM610)
276 * However, Xscale cores require this bit to be cleared.
277 */
278 if (cpu_is_xscale()) {
279 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
280 mem_types[i].prot_sect &= ~PMD_BIT4;
281 mem_types[i].prot_l1 &= ~PMD_BIT4;

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564
565 for (i = 0; i < nr; i++)
566 create_mapping(io_desc + i);
567}
568
569static int __init check_membank_valid(struct membank *mb)
570{
571 /*
594 * Check whether this memory region has non-zero size.
572 * Check whether this memory region has non-zero size or
573 * invalid node number.
595 */
574 */
596 if (mb->size == 0)
575 if (mb->size == 0 || mb->node >= MAX_NUMNODES)
597 return 0;
598
599 /*
600 * Check whether this memory region would entirely overlap
601 * the vmalloc area.
602 */
603 if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
604 printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "

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622 mb->size = newsize;
623 }
624
625 return 1;
626}
627
628static void __init sanity_check_meminfo(struct meminfo *mi)
629{
576 return 0;
577
578 /*
579 * Check whether this memory region would entirely overlap
580 * the vmalloc area.
581 */
582 if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
583 printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "

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601 mb->size = newsize;
602 }
603
604 return 1;
605}
606
607static void __init sanity_check_meminfo(struct meminfo *mi)
608{
630 int i;
631 int j;
609 int i, j;
632
633 for (i = 0, j = 0; i < mi->nr_banks; i++) {
634 if (check_membank_valid(&mi->bank[i]))
635 mi->bank[j++] = mi->bank[i];
636 }
637 mi->nr_banks = j;
638}
639

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611 for (i = 0, j = 0; i < mi->nr_banks; i++) {
612 if (check_membank_valid(&mi->bank[i]))
613 mi->bank[j++] = mi->bank[i];
614 }
615 mi->nr_banks = j;
616}
617

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