copypage-v4wb.c (d73e60b7144a86baf0fdfcc9537a70bb4f72e11c) copypage-v4wb.c (063b0a4207e43acbeff3d4b09f43e750e0212b48)
1/*
2 * linux/arch/arm/mm/copypage-v4wb.c
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
1/*
2 * linux/arch/arm/mm/copypage-v4wb.c
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11#include <linux/highmem.h>
11
12
12#include <asm/page.h>
13
14/*
13/*
15 * ARMv4 optimised copy_user_page
14 * ARMv4 optimised copy_user_highpage
16 *
17 * We flush the destination cache lines just before we write the data into the
18 * corresponding address. Since the Dcache is read-allocate, this removes the
19 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
20 * and merged as appropriate.
21 *
22 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
23 * instruction. If your processor does not supply this, you have to write your
15 *
16 * We flush the destination cache lines just before we write the data into the
17 * corresponding address. Since the Dcache is read-allocate, this removes the
18 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
19 * and merged as appropriate.
20 *
21 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
22 * instruction. If your processor does not supply this, you have to write your
24 * own copy_user_page that does the right thing.
23 * own copy_user_highpage that does the right thing.
25 */
24 */
26void __attribute__((naked))
27v4wb_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
25static void __attribute__((naked))
26v4wb_copy_user_page(void *kto, const void *kfrom)
28{
29 asm("\
30 stmfd sp!, {r4, lr} @ 2\n\
31 mov r2, %0 @ 1\n\
32 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
331: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
34 stmia r0!, {r3, r4, ip, lr} @ 4\n\
35 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\

--- 7 unchanged lines hidden (view full) ---

43 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
44 bne 1b @ 1\n\
45 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
46 ldmfd sp!, {r4, pc} @ 3"
47 :
48 : "I" (PAGE_SIZE / 64));
49}
50
27{
28 asm("\
29 stmfd sp!, {r4, lr} @ 2\n\
30 mov r2, %0 @ 1\n\
31 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
321: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
33 stmia r0!, {r3, r4, ip, lr} @ 4\n\
34 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\

--- 7 unchanged lines hidden (view full) ---

42 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
43 bne 1b @ 1\n\
44 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
45 ldmfd sp!, {r4, pc} @ 3"
46 :
47 : "I" (PAGE_SIZE / 64));
48}
49
50void v4wb_copy_user_highpage(struct page *to, struct page *from,
51 unsigned long vaddr)
52{
53 void *kto, *kfrom;
54
55 kto = kmap_atomic(to, KM_USER0);
56 kfrom = kmap_atomic(from, KM_USER1);
57 v4wb_copy_user_page(kto, kfrom);
58 kunmap_atomic(kfrom, KM_USER1);
59 kunmap_atomic(kto, KM_USER0);
60}
61
51/*
52 * ARMv4 optimised clear_user_page
53 *
54 * Same story as above.
55 */
56void __attribute__((naked))
57v4wb_clear_user_page(void *kaddr, unsigned long vaddr)
58{

--- 15 unchanged lines hidden (view full) ---

74 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
75 ldr pc, [sp], #4"
76 :
77 : "I" (PAGE_SIZE / 64));
78}
79
80struct cpu_user_fns v4wb_user_fns __initdata = {
81 .cpu_clear_user_page = v4wb_clear_user_page,
62/*
63 * ARMv4 optimised clear_user_page
64 *
65 * Same story as above.
66 */
67void __attribute__((naked))
68v4wb_clear_user_page(void *kaddr, unsigned long vaddr)
69{

--- 15 unchanged lines hidden (view full) ---

85 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
86 ldr pc, [sp], #4"
87 :
88 : "I" (PAGE_SIZE / 64));
89}
90
91struct cpu_user_fns v4wb_user_fns __initdata = {
92 .cpu_clear_user_page = v4wb_clear_user_page,
82 .cpu_copy_user_page = v4wb_copy_user_page,
93 .cpu_copy_user_highpage = v4wb_copy_user_highpage,
83};
94};