platsmp.c (cf9ce948f47640797bd19980e1d99c6d17d0bdc3) platsmp.c (b1cffebf1029c87e1f1984d48463ee21093a6bc7)
1/*
2 * linux/arch/arm/mach-tegra/platsmp.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * Copyright (C) 2009 Palm
8 * All Rights Reserved

--- 145 unchanged lines hidden (view full) ---

154 if (ncores > nr_cpu_ids) {
155 pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
156 ncores, nr_cpu_ids);
157 ncores = nr_cpu_ids;
158 }
159
160 for (i = 0; i < ncores; i++)
161 set_cpu_possible(i, true);
1/*
2 * linux/arch/arm/mach-tegra/platsmp.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * Copyright (C) 2009 Palm
8 * All Rights Reserved

--- 145 unchanged lines hidden (view full) ---

154 if (ncores > nr_cpu_ids) {
155 pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
156 ncores, nr_cpu_ids);
157 ncores = nr_cpu_ids;
158 }
159
160 for (i = 0; i < ncores; i++)
161 set_cpu_possible(i, true);
162
163 set_smp_cross_call(gic_raise_softirq);
164}
165
166static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
167{
168 tegra_cpu_reset_handler_init();
169 scu_enable(scu_base);
170}
171
172struct smp_operations tegra_smp_ops __initdata = {
173 .smp_init_cpus = tegra_smp_init_cpus,
174 .smp_prepare_cpus = tegra_smp_prepare_cpus,
175 .smp_secondary_init = tegra_secondary_init,
176 .smp_boot_secondary = tegra_boot_secondary,
177#ifdef CONFIG_HOTPLUG_CPU
178 .cpu_die = tegra_cpu_die,
179 .cpu_disable = tegra_cpu_disable,
180#endif
181};
162}
163
164static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
165{
166 tegra_cpu_reset_handler_init();
167 scu_enable(scu_base);
168}
169
170struct smp_operations tegra_smp_ops __initdata = {
171 .smp_init_cpus = tegra_smp_init_cpus,
172 .smp_prepare_cpus = tegra_smp_prepare_cpus,
173 .smp_secondary_init = tegra_secondary_init,
174 .smp_boot_secondary = tegra_boot_secondary,
175#ifdef CONFIG_HOTPLUG_CPU
176 .cpu_die = tegra_cpu_die,
177 .cpu_disable = tegra_cpu_disable,
178#endif
179};