platsmp.c (9938b04472d5c59f8bd8152a548533a8599596a2) platsmp.c (64fc2a947a9873700929ec0ef02b4654a04e0476)
1/*
2 * arch/arm/mach-spear13xx/platsmp.c
3 *
4 * based upon linux/arch/arm/mach-realview/platsmp.c
5 *
6 * Copyright (C) 2012 ST Microelectronics Ltd.
7 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
8 *

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112
113 scu_enable(scu_base);
114
115 /*
116 * Write the address of secondary startup into the system-wide location
117 * (presently it is in SRAM). The BootMonitor waits until it receives a
118 * soft interrupt, and then the secondary CPU branches to this address.
119 */
1/*
2 * arch/arm/mach-spear13xx/platsmp.c
3 *
4 * based upon linux/arch/arm/mach-realview/platsmp.c
5 *
6 * Copyright (C) 2012 ST Microelectronics Ltd.
7 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
8 *

--- 103 unchanged lines hidden (view full) ---

112
113 scu_enable(scu_base);
114
115 /*
116 * Write the address of secondary startup into the system-wide location
117 * (presently it is in SRAM). The BootMonitor waits until it receives a
118 * soft interrupt, and then the secondary CPU branches to this address.
119 */
120 __raw_writel(virt_to_phys(spear13xx_secondary_startup), SYS_LOCATION);
120 __raw_writel(__pa_symbol(spear13xx_secondary_startup), SYS_LOCATION);
121}
122
123const struct smp_operations spear13xx_smp_ops __initconst = {
124 .smp_init_cpus = spear13xx_smp_init_cpus,
125 .smp_prepare_cpus = spear13xx_smp_prepare_cpus,
126 .smp_secondary_init = spear13xx_secondary_init,
127 .smp_boot_secondary = spear13xx_boot_secondary,
128#ifdef CONFIG_HOTPLUG_CPU
129 .cpu_die = spear13xx_cpu_die,
130#endif
131};
121}
122
123const struct smp_operations spear13xx_smp_ops __initconst = {
124 .smp_init_cpus = spear13xx_smp_init_cpus,
125 .smp_prepare_cpus = spear13xx_smp_prepare_cpus,
126 .smp_secondary_init = spear13xx_secondary_init,
127 .smp_boot_secondary = spear13xx_boot_secondary,
128#ifdef CONFIG_HOTPLUG_CPU
129 .cpu_die = spear13xx_cpu_die,
130#endif
131};