| platsmp.c (8c57a5e7b2820f349c95b8c8393fec1e0f4070d2) | platsmp.c (64fc2a947a9873700929ec0ef02b4654a04e0476) |
|---|---|
| 1/* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * Copyright 2012 Pavel Machek <pavel@denx.de> 4 * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. 5 * Copyright (C) 2012 Altera Corporation 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, --- 26 unchanged lines hidden (view full) --- 35 36 if (socfpga_cpu1start_addr) { 37 /* This will put CPU #1 into reset. */ 38 writel(RSTMGR_MPUMODRST_CPU1, 39 rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); 40 41 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); 42 | 1/* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * Copyright 2012 Pavel Machek <pavel@denx.de> 4 * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. 5 * Copyright (C) 2012 Altera Corporation 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, --- 26 unchanged lines hidden (view full) --- 35 36 if (socfpga_cpu1start_addr) { 37 /* This will put CPU #1 into reset. */ 38 writel(RSTMGR_MPUMODRST_CPU1, 39 rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); 40 41 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); 42 |
| 43 writel(virt_to_phys(secondary_startup), | 43 writel(__pa_symbol(secondary_startup), |
| 44 sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff)); 45 46 flush_cache_all(); 47 smp_wmb(); 48 outer_clean_range(0, trampoline_size); 49 50 /* This will release CPU #1 out of reset. */ 51 writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); --- 6 unchanged lines hidden (view full) --- 58{ 59 int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; 60 61 if (socfpga_cpu1start_addr) { 62 writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr + 63 SOCFPGA_A10_RSTMGR_MODMPURST); 64 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); 65 | 44 sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff)); 45 46 flush_cache_all(); 47 smp_wmb(); 48 outer_clean_range(0, trampoline_size); 49 50 /* This will release CPU #1 out of reset. */ 51 writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); --- 6 unchanged lines hidden (view full) --- 58{ 59 int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; 60 61 if (socfpga_cpu1start_addr) { 62 writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr + 63 SOCFPGA_A10_RSTMGR_MODMPURST); 64 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); 65 |
| 66 writel(virt_to_phys(secondary_startup), | 66 writel(__pa_symbol(secondary_startup), |
| 67 sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff)); 68 69 flush_cache_all(); 70 smp_wmb(); 71 outer_clean_range(0, trampoline_size); 72 73 /* This will release CPU #1 out of reset. */ 74 writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST); --- 67 unchanged lines hidden --- | 67 sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff)); 68 69 flush_cache_all(); 70 smp_wmb(); 71 outer_clean_range(0, trampoline_size); 72 73 /* This will release CPU #1 out of reset. */ 74 writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST); --- 67 unchanged lines hidden --- |