pm34xx.c (1540f214065982e6cbc6b8da1fe65a15e358f7c5) pm34xx.c (72e06d087204f3bc9acf281717b90ebf0b9731f7)
1/*
2 * OMAP3 Power Management Routines
3 *
4 * Copyright (C) 2006-2008 Nokia Corporation
5 * Tony Lindgren <tony@atomide.com>
6 * Jouni Hogander
7 *
8 * Copyright (C) 2007 Texas Instruments, Inc.

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27#include <linux/gpio.h>
28#include <linux/clk.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/console.h>
32
33#include <plat/sram.h>
34#include "clockdomain.h"
1/*
2 * OMAP3 Power Management Routines
3 *
4 * Copyright (C) 2006-2008 Nokia Corporation
5 * Tony Lindgren <tony@atomide.com>
6 * Jouni Hogander
7 *
8 * Copyright (C) 2007 Texas Instruments, Inc.

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27#include <linux/gpio.h>
28#include <linux/clk.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/console.h>
32
33#include <plat/sram.h>
34#include "clockdomain.h"
35#include <plat/powerdomain.h>
35#include "powerdomain.h"
36#include <plat/serial.h>
37#include <plat/sdrc.h>
38#include <plat/prcm.h>
39#include <plat/gpmc.h>
40#include <plat/dma.h>
41
42#include <asm/tlbflush.h>
43

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355 /* save_state = 0 => Nothing to save and restored */
356 /* save_state = 1 => Only L1 and logic lost */
357 /* save_state = 2 => Only L2 lost */
358 /* save_state = 3 => L1, L2 and logic lost */
359 int save_state = 0;
360 int mpu_next_state = PWRDM_POWER_ON;
361 int per_next_state = PWRDM_POWER_ON;
362 int core_next_state = PWRDM_POWER_ON;
36#include <plat/serial.h>
37#include <plat/sdrc.h>
38#include <plat/prcm.h>
39#include <plat/gpmc.h>
40#include <plat/dma.h>
41
42#include <asm/tlbflush.h>
43

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355 /* save_state = 0 => Nothing to save and restored */
356 /* save_state = 1 => Only L1 and logic lost */
357 /* save_state = 2 => Only L2 lost */
358 /* save_state = 3 => L1, L2 and logic lost */
359 int save_state = 0;
360 int mpu_next_state = PWRDM_POWER_ON;
361 int per_next_state = PWRDM_POWER_ON;
362 int core_next_state = PWRDM_POWER_ON;
363 int per_going_off;
363 int core_prev_state, per_prev_state;
364 u32 sdrc_pwr = 0;
365
366 if (!_omap_sram_idle)
367 return;
368
369 pwrdm_clear_all_prev_pwrst(mpu_pwrdm);
370 pwrdm_clear_all_prev_pwrst(neon_pwrdm);

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406 if (!is_suspending())
407 if (per_next_state < PWRDM_POWER_ON ||
408 core_next_state < PWRDM_POWER_ON)
409 if (try_acquire_console_sem())
410 goto console_still_active;
411
412 /* PER */
413 if (per_next_state < PWRDM_POWER_ON) {
364 int core_prev_state, per_prev_state;
365 u32 sdrc_pwr = 0;
366
367 if (!_omap_sram_idle)
368 return;
369
370 pwrdm_clear_all_prev_pwrst(mpu_pwrdm);
371 pwrdm_clear_all_prev_pwrst(neon_pwrdm);

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407 if (!is_suspending())
408 if (per_next_state < PWRDM_POWER_ON ||
409 core_next_state < PWRDM_POWER_ON)
410 if (try_acquire_console_sem())
411 goto console_still_active;
412
413 /* PER */
414 if (per_next_state < PWRDM_POWER_ON) {
415 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
414 omap_uart_prepare_idle(2);
415 omap_uart_prepare_idle(3);
416 omap_uart_prepare_idle(2);
417 omap_uart_prepare_idle(3);
416 omap2_gpio_prepare_for_idle(per_next_state);
418 omap2_gpio_prepare_for_idle(per_going_off);
417 if (per_next_state == PWRDM_POWER_OFF)
418 omap3_per_save_context();
419 }
420
421 /* CORE */
422 if (core_next_state < PWRDM_POWER_ON) {
423 omap_uart_prepare_idle(0);
424 omap_uart_prepare_idle(1);

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419 if (per_next_state == PWRDM_POWER_OFF)
420 omap3_per_save_context();
421 }
422
423 /* CORE */
424 if (core_next_state < PWRDM_POWER_ON) {
425 omap_uart_prepare_idle(0);
426 omap_uart_prepare_idle(1);

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