omap54xx.h (27eb2c4b3d3e13f376a359e293c212a2e9407af5) | omap54xx.h (a3a9384a115756e275ed3845b5f92f21efd5a691) |
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1/*: 2 * Address mappings and base address for OMAP5 interconnects 3 * and peripherals. 4 * 5 * Copyright (C) 2012 Texas Instruments 6 * Santosh Shilimkar <santosh.shilimkar@ti.com> 7 * Sricharan <r.sricharan@ti.com> 8 * --- 16 unchanged lines hidden (view full) --- 25#define OMAP54XX_CM_CORE_AON_BASE 0x4a004000 26#define OMAP54XX_CM_CORE_BASE 0x4a008000 27#define OMAP54XX_PRM_BASE 0x4ae06000 28#define OMAP54XX_PRCM_MPU_BASE 0x48243000 29#define OMAP54XX_SCM_BASE 0x4a002000 30#define OMAP54XX_CTRL_BASE 0x4a002800 31#define OMAP54XX_SAR_RAM_BASE 0x4ae26000 32 | 1/*: 2 * Address mappings and base address for OMAP5 interconnects 3 * and peripherals. 4 * 5 * Copyright (C) 2012 Texas Instruments 6 * Santosh Shilimkar <santosh.shilimkar@ti.com> 7 * Sricharan <r.sricharan@ti.com> 8 * --- 16 unchanged lines hidden (view full) --- 25#define OMAP54XX_CM_CORE_AON_BASE 0x4a004000 26#define OMAP54XX_CM_CORE_BASE 0x4a008000 27#define OMAP54XX_PRM_BASE 0x4ae06000 28#define OMAP54XX_PRCM_MPU_BASE 0x48243000 29#define OMAP54XX_SCM_BASE 0x4a002000 30#define OMAP54XX_CTRL_BASE 0x4a002800 31#define OMAP54XX_SAR_RAM_BASE 0x4ae26000 32 |
33#define DRA7XX_CM_CORE_AON_BASE 0x4a005000 34#define DRA7XX_CTRL_BASE 0x4a003400 35#define DRA7XX_TAP_BASE 0x4ae0c000 36 |
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33#endif /* __ASM_SOC_OMAP555554XX_H */ | 37#endif /* __ASM_SOC_OMAP555554XX_H */ |