io.c (8cad95f56f63a63abab0ff0cb451c0bdd5a885dc) io.c (02b83dcb3db7974cc25834b67ffac7eb90ce56ac)
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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32#include "iomap.h"
33#include "voltage.h"
34#include "powerdomain.h"
35#include "clockdomain.h"
36#include "common.h"
37#include "clock.h"
38#include "clock2xxx.h"
39#include "clock3xxx.h"
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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32#include "iomap.h"
33#include "voltage.h"
34#include "powerdomain.h"
35#include "clockdomain.h"
36#include "common.h"
37#include "clock.h"
38#include "clock2xxx.h"
39#include "clock3xxx.h"
40#include "omap-pm.h"
41#include "sdrc.h"
42#include "control.h"
43#include "serial.h"
44#include "sram.h"
45#include "cm2xxx.h"
46#include "cm3xxx.h"
47#include "cm33xx.h"
48#include "cm44xx.h"

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416
417 /* Set the default postsetup state for all hwmods */
418#ifdef CONFIG_PM
419 postsetup_state = _HWMOD_STATE_IDLE;
420#else
421 postsetup_state = _HWMOD_STATE_ENABLED;
422#endif
423 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
40#include "sdrc.h"
41#include "control.h"
42#include "serial.h"
43#include "sram.h"
44#include "cm2xxx.h"
45#include "cm3xxx.h"
46#include "cm33xx.h"
47#include "cm44xx.h"

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415
416 /* Set the default postsetup state for all hwmods */
417#ifdef CONFIG_PM
418 postsetup_state = _HWMOD_STATE_IDLE;
419#else
420 postsetup_state = _HWMOD_STATE_ENABLED;
421#endif
422 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
424
425 omap_pm_if_early_init();
426}
427
423}
424
428static void __init __maybe_unused omap_common_late_init(void)
429{
430 omap2_common_pm_late_init();
431}
432
433#ifdef CONFIG_SOC_OMAP2420
434void __init omap2420_init_early(void)
435{
436 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
437 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
438 OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
439 omap2_control_base_init();
440 omap2xxx_check_revision();

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445 omap2420_hwmod_init();
446 omap_hwmod_init_postsetup();
447 omap_clk_soc_init = omap2420_dt_clk_init;
448 rate_table = omap2420_rate_table;
449}
450
451void __init omap2420_init_late(void)
452{
425#ifdef CONFIG_SOC_OMAP2420
426void __init omap2420_init_early(void)
427{
428 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
429 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
430 OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
431 omap2_control_base_init();
432 omap2xxx_check_revision();

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437 omap2420_hwmod_init();
438 omap_hwmod_init_postsetup();
439 omap_clk_soc_init = omap2420_dt_clk_init;
440 rate_table = omap2420_rate_table;
441}
442
443void __init omap2420_init_late(void)
444{
453 omap_common_late_init();
454 omap2_pm_init();
455 omap2_clk_enable_autoidle_all();
445 omap_pm_soc_init = omap2_pm_init;
456}
457#endif
458
459#ifdef CONFIG_SOC_OMAP2430
460void __init omap2430_init_early(void)
461{
462 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
463 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),

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471 omap2430_hwmod_init();
472 omap_hwmod_init_postsetup();
473 omap_clk_soc_init = omap2430_dt_clk_init;
474 rate_table = omap2430_rate_table;
475}
476
477void __init omap2430_init_late(void)
478{
446}
447#endif
448
449#ifdef CONFIG_SOC_OMAP2430
450void __init omap2430_init_early(void)
451{
452 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
453 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),

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461 omap2430_hwmod_init();
462 omap_hwmod_init_postsetup();
463 omap_clk_soc_init = omap2430_dt_clk_init;
464 rate_table = omap2430_rate_table;
465}
466
467void __init omap2430_init_late(void)
468{
479 omap_common_late_init();
480 omap2_pm_init();
481 omap2_clk_enable_autoidle_all();
469 omap_pm_soc_init = omap2_pm_init;
482}
483#endif
484
485/*
486 * Currently only board-omap3beagle.c should call this because of the
487 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
488 */
489#ifdef CONFIG_ARCH_OMAP3

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524void __init am35xx_init_early(void)
525{
526 omap3_init_early();
527 omap_clk_soc_init = am35xx_dt_clk_init;
528}
529
530void __init omap3_init_late(void)
531{
470}
471#endif
472
473/*
474 * Currently only board-omap3beagle.c should call this because of the
475 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
476 */
477#ifdef CONFIG_ARCH_OMAP3

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512void __init am35xx_init_early(void)
513{
514 omap3_init_early();
515 omap_clk_soc_init = am35xx_dt_clk_init;
516}
517
518void __init omap3_init_late(void)
519{
532 omap_common_late_init();
533 omap3_pm_init();
534 omap2_clk_enable_autoidle_all();
520 omap_pm_soc_init = omap3_pm_init;
535}
536
521}
522
537void __init omap3430_init_late(void)
538{
539 omap_common_late_init();
540 omap3_pm_init();
541 omap2_clk_enable_autoidle_all();
542}
543
544void __init omap35xx_init_late(void)
545{
546 omap_common_late_init();
547 omap3_pm_init();
548 omap2_clk_enable_autoidle_all();
549}
550
551void __init omap3630_init_late(void)
552{
553 omap_common_late_init();
554 omap3_pm_init();
555 omap2_clk_enable_autoidle_all();
556}
557
558void __init am35xx_init_late(void)
559{
560 omap_common_late_init();
561 omap3_pm_init();
562 omap2_clk_enable_autoidle_all();
563}
564
565void __init ti81xx_init_late(void)
566{
523void __init ti81xx_init_late(void)
524{
567 omap_common_late_init();
568 omap2_clk_enable_autoidle_all();
525 omap_pm_soc_init = omap_pm_nop_init;
569}
570#endif
571
572#ifdef CONFIG_SOC_TI81XX
573void __init ti814x_init_early(void)
574{
575 omap2_set_globals_tap(TI814X_CLASS,
576 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));

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616 am33xx_clockdomains_init();
617 am33xx_hwmod_init();
618 omap_hwmod_init_postsetup();
619 omap_clk_soc_init = am33xx_dt_clk_init;
620}
621
622void __init am33xx_init_late(void)
623{
526}
527#endif
528
529#ifdef CONFIG_SOC_TI81XX
530void __init ti814x_init_early(void)
531{
532 omap2_set_globals_tap(TI814X_CLASS,
533 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));

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573 am33xx_clockdomains_init();
574 am33xx_hwmod_init();
575 omap_hwmod_init_postsetup();
576 omap_clk_soc_init = am33xx_dt_clk_init;
577}
578
579void __init am33xx_init_late(void)
580{
624 omap_common_late_init();
625 amx3_common_pm_init();
581 omap_pm_soc_init = amx3_common_pm_init;
626}
627#endif
628
629#ifdef CONFIG_SOC_AM43XX
630void __init am43xx_init_early(void)
631{
632 omap2_set_globals_tap(AM335X_CLASS,
633 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));

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640 am43xx_hwmod_init();
641 omap_hwmod_init_postsetup();
642 omap_l2_cache_init();
643 omap_clk_soc_init = am43xx_dt_clk_init;
644}
645
646void __init am43xx_init_late(void)
647{
582}
583#endif
584
585#ifdef CONFIG_SOC_AM43XX
586void __init am43xx_init_early(void)
587{
588 omap2_set_globals_tap(AM335X_CLASS,
589 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));

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596 am43xx_hwmod_init();
597 omap_hwmod_init_postsetup();
598 omap_l2_cache_init();
599 omap_clk_soc_init = am43xx_dt_clk_init;
600}
601
602void __init am43xx_init_late(void)
603{
648 omap_common_late_init();
649 omap2_clk_enable_autoidle_all();
650 amx3_common_pm_init();
604 omap_pm_soc_init = amx3_common_pm_init;
651}
652#endif
653
654#ifdef CONFIG_ARCH_OMAP4
655void __init omap4430_init_early(void)
656{
657 omap2_set_globals_tap(OMAP443X_CLASS,
658 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));

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670 omap44xx_hwmod_init();
671 omap_hwmod_init_postsetup();
672 omap_l2_cache_init();
673 omap_clk_soc_init = omap4xxx_dt_clk_init;
674}
675
676void __init omap4430_init_late(void)
677{
605}
606#endif
607
608#ifdef CONFIG_ARCH_OMAP4
609void __init omap4430_init_early(void)
610{
611 omap2_set_globals_tap(OMAP443X_CLASS,
612 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));

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624 omap44xx_hwmod_init();
625 omap_hwmod_init_postsetup();
626 omap_l2_cache_init();
627 omap_clk_soc_init = omap4xxx_dt_clk_init;
628}
629
630void __init omap4430_init_late(void)
631{
678 omap_common_late_init();
679 omap4_pm_init();
680 omap2_clk_enable_autoidle_all();
632 omap_pm_soc_init = omap4_pm_init;
681}
682#endif
683
684#ifdef CONFIG_SOC_OMAP5
685void __init omap5_init_early(void)
686{
687 omap2_set_globals_tap(OMAP54XX_CLASS,
688 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));

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698 omap54xx_clockdomains_init();
699 omap54xx_hwmod_init();
700 omap_hwmod_init_postsetup();
701 omap_clk_soc_init = omap5xxx_dt_clk_init;
702}
703
704void __init omap5_init_late(void)
705{
633}
634#endif
635
636#ifdef CONFIG_SOC_OMAP5
637void __init omap5_init_early(void)
638{
639 omap2_set_globals_tap(OMAP54XX_CLASS,
640 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));

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650 omap54xx_clockdomains_init();
651 omap54xx_hwmod_init();
652 omap_hwmod_init_postsetup();
653 omap_clk_soc_init = omap5xxx_dt_clk_init;
654}
655
656void __init omap5_init_late(void)
657{
706 omap_common_late_init();
707 omap4_pm_init();
708 omap2_clk_enable_autoidle_all();
658 omap_pm_soc_init = omap4_pm_init;
709}
710#endif
711
712#ifdef CONFIG_SOC_DRA7XX
713void __init dra7xx_init_early(void)
714{
715 omap2_set_globals_tap(DRA7XX_CLASS,
716 OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));

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723 dra7xx_clockdomains_init();
724 dra7xx_hwmod_init();
725 omap_hwmod_init_postsetup();
726 omap_clk_soc_init = dra7xx_dt_clk_init;
727}
728
729void __init dra7xx_init_late(void)
730{
659}
660#endif
661
662#ifdef CONFIG_SOC_DRA7XX
663void __init dra7xx_init_early(void)
664{
665 omap2_set_globals_tap(DRA7XX_CLASS,
666 OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));

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673 dra7xx_clockdomains_init();
674 dra7xx_hwmod_init();
675 omap_hwmod_init_postsetup();
676 omap_clk_soc_init = dra7xx_dt_clk_init;
677}
678
679void __init dra7xx_init_late(void)
680{
731 omap_common_late_init();
732 omap4_pm_init();
733 omap2_clk_enable_autoidle_all();
681 omap_pm_soc_init = omap4_pm_init;
734}
735#endif
736
737
738void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
739 struct omap_sdrc_params *sdrc_cs1)
740{
741 omap_sram_init();

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683#endif
684
685
686void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
687 struct omap_sdrc_params *sdrc_cs1)
688{
689 omap_sram_init();

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