id.c (f99e44a7f3352d7131c7526207f153f13ec5acd4) id.c (d240ef3056528785a28ad9b3e5013205b06e7d03)
1/*
2 * linux/arch/arm/mach-omap2/id.c
3 *
4 * OMAP2 CPU identification code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *

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309 u16 hawkeye;
310 u8 rev;
311
312 /*
313 * We cannot access revision registers on ES1.0.
314 * If the processor type is Cortex-A8 and the revision is 0x0
315 * it means its Cortex r0p0 which is 3430 ES1.0.
316 */
1/*
2 * linux/arch/arm/mach-omap2/id.c
3 *
4 * OMAP2 CPU identification code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *

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309 u16 hawkeye;
310 u8 rev;
311
312 /*
313 * We cannot access revision registers on ES1.0.
314 * If the processor type is Cortex-A8 and the revision is 0x0
315 * it means its Cortex r0p0 which is 3430 ES1.0.
316 */
317 cpuid = read_cpuid(CPUID_ID);
317 cpuid = read_cpuid_id();
318 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
319 omap_revision = OMAP3430_REV_ES1_0;
320 cpu_rev = "1.0";
321 return;
322 }
323
324 /*
325 * Detection for 34xx ES2.0 and above can be done with just

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414 break;
415 case 0xb944:
416 switch (rev) {
417 case 0:
418 omap_revision = AM335X_REV_ES1_0;
419 cpu_rev = "1.0";
420 break;
421 case 1:
318 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
319 omap_revision = OMAP3430_REV_ES1_0;
320 cpu_rev = "1.0";
321 return;
322 }
323
324 /*
325 * Detection for 34xx ES2.0 and above can be done with just

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414 break;
415 case 0xb944:
416 switch (rev) {
417 case 0:
418 omap_revision = AM335X_REV_ES1_0;
419 cpu_rev = "1.0";
420 break;
421 case 1:
422 /* FALLTHROUGH */
423 default:
424 omap_revision = AM335X_REV_ES2_0;
425 cpu_rev = "2.0";
426 break;
422 omap_revision = AM335X_REV_ES2_0;
423 cpu_rev = "2.0";
424 break;
425 case 2:
426 /* FALLTHROUGH */
427 default:
428 omap_revision = AM335X_REV_ES2_1;
429 cpu_rev = "2.1";
430 break;
427 }
428 break;
429 case 0xb8f2:
430 switch (rev) {
431 case 0:
432 /* FALLTHROUGH */
433 case 1:
434 omap_revision = TI8148_REV_ES1_0;

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470 hawkeye = (idcode >> 12) & 0xffff;
471 rev = (idcode >> 28) & 0xf;
472
473 /*
474 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
475 * Use ARM register to detect the correct ES version
476 */
477 if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) {
431 }
432 break;
433 case 0xb8f2:
434 switch (rev) {
435 case 0:
436 /* FALLTHROUGH */
437 case 1:
438 omap_revision = TI8148_REV_ES1_0;

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474 hawkeye = (idcode >> 12) & 0xffff;
475 rev = (idcode >> 28) & 0xf;
476
477 /*
478 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
479 * Use ARM register to detect the correct ES version
480 */
481 if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) {
478 idcode = read_cpuid(CPUID_ID);
482 idcode = read_cpuid_id();
479 rev = (idcode & 0xf) - 1;
480 }
481
482 switch (hawkeye) {
483 case 0xb852:
484 switch (rev) {
485 case 0:
486 omap_revision = OMAP4430_REV_ES1_0;

--- 170 unchanged lines hidden --- 		483 rev = (idcode & 0xf) - 1;
484 }
485
486 switch (hawkeye) {
487 case 0xb852:
488 switch (rev) {
489 case 0:
490 omap_revision = OMAP4430_REV_ES1_0;

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