src.c (8c57a5e7b2820f349c95b8c8393fec1e0f4070d2) src.c (64fc2a947a9873700929ec0ef02b4654a04e0476)
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *

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94 val |= 1 << (BP_SRC_SCR_CORE1_RST + cpu - 1);
95 writel_relaxed(val, src_base + SRC_SCR);
96 spin_unlock(&scr_lock);
97}
98
99void imx_set_cpu_jump(int cpu, void *jump_addr)
100{
101 cpu = cpu_logical_map(cpu);
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *

--- 85 unchanged lines hidden (view full) ---

94 val |= 1 << (BP_SRC_SCR_CORE1_RST + cpu - 1);
95 writel_relaxed(val, src_base + SRC_SCR);
96 spin_unlock(&scr_lock);
97}
98
99void imx_set_cpu_jump(int cpu, void *jump_addr)
100{
101 cpu = cpu_logical_map(cpu);
102 writel_relaxed(virt_to_phys(jump_addr),
102 writel_relaxed(__pa_symbol(jump_addr),
103 src_base + SRC_GPR1 + cpu * 8);
104}
105
106u32 imx_get_cpu_arg(int cpu)
107{
108 cpu = cpu_logical_map(cpu);
109 return readl_relaxed(src_base + SRC_GPR1 + cpu * 8 + 4);
110}

--- 32 unchanged lines hidden --- 		103 src_base + SRC_GPR1 + cpu * 8);
104}
105
106u32 imx_get_cpu_arg(int cpu)
107{
108 cpu = cpu_logical_map(cpu);
109 return readl_relaxed(src_base + SRC_GPR1 + cpu * 8 + 4);
110}

--- 32 unchanged lines hidden ---