platsmp.c (f26e8817b235d8764363bffcc9cbfc61867371f2) platsmp.c (64fc2a947a9873700929ec0ef02b4654a04e0476)
1/*
2 * Copyright (c) 2013 Linaro Ltd.
3 * Copyright (c) 2013 Hisilicon Limited.
4 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.

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23
24static void __iomem *ctrl_base;
25
26void hi3xxx_set_cpu_jump(int cpu, void *jump_addr)
27{
28 cpu = cpu_logical_map(cpu);
29 if (!cpu || !ctrl_base)
30 return;
1/*
2 * Copyright (c) 2013 Linaro Ltd.
3 * Copyright (c) 2013 Hisilicon Limited.
4 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.

--- 14 unchanged lines hidden (view full) ---

23
24static void __iomem *ctrl_base;
25
26void hi3xxx_set_cpu_jump(int cpu, void *jump_addr)
27{
28 cpu = cpu_logical_map(cpu);
29 if (!cpu || !ctrl_base)
30 return;
31 writel_relaxed(virt_to_phys(jump_addr), ctrl_base + ((cpu - 1) << 2));
31 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2));
32}
33
34int hi3xxx_get_cpu_jump(int cpu)
35{
36 cpu = cpu_logical_map(cpu);
37 if (!cpu || !ctrl_base)
38 return 0;
39 return readl_relaxed(ctrl_base + ((cpu - 1) << 2));

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113 writel_relaxed(jump_addr, virt + 4); /* pc jump phy address */
114 iounmap(virt);
115}
116
117static int hix5hd2_boot_secondary(unsigned int cpu, struct task_struct *idle)
118{
119 phys_addr_t jumpaddr;
120
32}
33
34int hi3xxx_get_cpu_jump(int cpu)
35{
36 cpu = cpu_logical_map(cpu);
37 if (!cpu || !ctrl_base)
38 return 0;
39 return readl_relaxed(ctrl_base + ((cpu - 1) << 2));

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113 writel_relaxed(jump_addr, virt + 4); /* pc jump phy address */
114 iounmap(virt);
115}
116
117static int hix5hd2_boot_secondary(unsigned int cpu, struct task_struct *idle)
118{
119 phys_addr_t jumpaddr;
120
121 jumpaddr = virt_to_phys(secondary_startup);
121 jumpaddr = __pa_symbol(secondary_startup);
122 hix5hd2_set_scu_boot_addr(HIX5HD2_BOOT_ADDRESS, jumpaddr);
123 hix5hd2_set_cpu(cpu, true);
124 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
125 return 0;
126}
127
128
129static const struct smp_operations hix5hd2_smp_ops __initconst = {

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151
152static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle)
153{
154 phys_addr_t jumpaddr;
155 unsigned int remap_reg_value = 0;
156 struct device_node *node;
157
158
122 hix5hd2_set_scu_boot_addr(HIX5HD2_BOOT_ADDRESS, jumpaddr);
123 hix5hd2_set_cpu(cpu, true);
124 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
125 return 0;
126}
127
128
129static const struct smp_operations hix5hd2_smp_ops __initconst = {

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151
152static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle)
153{
154 phys_addr_t jumpaddr;
155 unsigned int remap_reg_value = 0;
156 struct device_node *node;
157
158
159 jumpaddr = virt_to_phys(secondary_startup);
159 jumpaddr = __pa_symbol(secondary_startup);
160 hip01_set_boot_addr(HIP01_BOOT_ADDRESS, jumpaddr);
161
162 node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl");
163 if (WARN_ON(!node))
164 return -1;
165 ctrl_base = of_iomap(node, 0);
166
167 /* set the secondary core boot from DDR */

--- 19 unchanged lines hidden --- 		160 hip01_set_boot_addr(HIP01_BOOT_ADDRESS, jumpaddr);
161
162 node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl");
163 if (WARN_ON(!node))
164 return -1;
165 ctrl_base = of_iomap(node, 0);
166
167 /* set the secondary core boot from DDR */

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