platsmp.c (f45913fde00f13f502730809d128e607da2a57c8) platsmp.c (65c9a8530bec45cea1137635b7992bbb417de9de)
1/* linux/arch/arm/mach-exynos4/platsmp.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Cloned from linux/arch/arm/mach-vexpress/platsmp.c
7 *
8 * Copyright (C) 2002 ARM Ltd.

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23
24#include <asm/cacheflush.h>
25#include <asm/smp_plat.h>
26#include <asm/smp_scu.h>
27#include <asm/firmware.h>
28
29#include <mach/hardware.h>
30#include <mach/regs-clock.h>
1/* linux/arch/arm/mach-exynos4/platsmp.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Cloned from linux/arch/arm/mach-vexpress/platsmp.c
7 *
8 * Copyright (C) 2002 ARM Ltd.

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23
24#include <asm/cacheflush.h>
25#include <asm/smp_plat.h>
26#include <asm/smp_scu.h>
27#include <asm/firmware.h>
28
29#include <mach/hardware.h>
30#include <mach/regs-clock.h>
31#include <mach/regs-pmu.h>
32
33#include <plat/cpu.h>
34
35#include "common.h"
31
32#include <plat/cpu.h>
33
34#include "common.h"
35#include "regs-pmu.h"
36
37extern void exynos4_secondary_startup(void);
38
39static inline void __iomem *cpu_boot_reg_base(void)
40{
41 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
42 return S5P_INFORM5;
43 return S5P_VA_SYSRAM;

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59 * Write pen_release in a way that is guaranteed to be visible to all
60 * observers, irrespective of whether they're taking part in coherency
61 * or not. This is necessary for the hotplug code to work reliably.
62 */
63static void write_pen_release(int val)
64{
65 pen_release = val;
66 smp_wmb();
36
37extern void exynos4_secondary_startup(void);
38
39static inline void __iomem *cpu_boot_reg_base(void)
40{
41 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
42 return S5P_INFORM5;
43 return S5P_VA_SYSRAM;

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59 * Write pen_release in a way that is guaranteed to be visible to all
60 * observers, irrespective of whether they're taking part in coherency
61 * or not. This is necessary for the hotplug code to work reliably.
62 */
63static void write_pen_release(int val)
64{
65 pen_release = val;
66 smp_wmb();
67 sync_cache_w(&pen_release);
67 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
68 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
68}
69
70static void __iomem *scu_base_addr(void)
71{
72 return (void __iomem *)(S5P_VA_SCU);
73}
74
75static DEFINE_SPINLOCK(boot_lock);

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70
71static void __iomem *scu_base_addr(void)
72{
73 return (void __iomem *)(S5P_VA_SCU);
74}
75
76static DEFINE_SPINLOCK(boot_lock);

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