platsmp.c (f26e8817b235d8764363bffcc9cbfc61867371f2) | platsmp.c (64fc2a947a9873700929ec0ef02b4654a04e0476) |
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1/* 2 * Copyright (C) 2014-2015 Broadcom Corporation 3 * Copyright 2014 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation version 2. 8 * --- 102 unchanged lines hidden (view full) --- 111 112 sku_rom_lut = ioremap_nocache((phys_addr_t)secondary_boot_addr, 113 sizeof(phys_addr_t)); 114 if (!sku_rom_lut) { 115 pr_warn("unable to ioremap SKU-ROM LUT register for cpu %u\n", cpu); 116 return -ENOMEM; 117 } 118 | 1/* 2 * Copyright (C) 2014-2015 Broadcom Corporation 3 * Copyright 2014 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation version 2. 8 * --- 102 unchanged lines hidden (view full) --- 111 112 sku_rom_lut = ioremap_nocache((phys_addr_t)secondary_boot_addr, 113 sizeof(phys_addr_t)); 114 if (!sku_rom_lut) { 115 pr_warn("unable to ioremap SKU-ROM LUT register for cpu %u\n", cpu); 116 return -ENOMEM; 117 } 118 |
119 secondary_startup_phy = virt_to_phys(secondary_startup); | 119 secondary_startup_phy = __pa_symbol(secondary_startup); |
120 BUG_ON(secondary_startup_phy > (phys_addr_t)U32_MAX); 121 122 writel_relaxed(secondary_startup_phy, sku_rom_lut); 123 124 /* Ensure the write is visible to the secondary core */ 125 smp_wmb(); 126 127 iounmap(sku_rom_lut); --- 56 unchanged lines hidden (view full) --- 184 pr_err("unable to map boot register for cpu %u\n", cpu_id); 185 return -ENOMEM; 186 } 187 188 /* 189 * Secondary cores will start in secondary_startup(), 190 * defined in "arch/arm/kernel/head.S" 191 */ | 120 BUG_ON(secondary_startup_phy > (phys_addr_t)U32_MAX); 121 122 writel_relaxed(secondary_startup_phy, sku_rom_lut); 123 124 /* Ensure the write is visible to the secondary core */ 125 smp_wmb(); 126 127 iounmap(sku_rom_lut); --- 56 unchanged lines hidden (view full) --- 184 pr_err("unable to map boot register for cpu %u\n", cpu_id); 185 return -ENOMEM; 186 } 187 188 /* 189 * Secondary cores will start in secondary_startup(), 190 * defined in "arch/arm/kernel/head.S" 191 */ |
192 boot_func = virt_to_phys(secondary_startup); | 192 boot_func = __pa_symbol(secondary_startup); |
193 BUG_ON(boot_func & BOOT_ADDR_CPUID_MASK); 194 BUG_ON(boot_func > (phys_addr_t)U32_MAX); 195 196 /* The core to start is encoded in the low bits */ 197 boot_val = (u32)boot_func | cpu_id; 198 writel_relaxed(boot_val, boot_reg); 199 200 sev(); --- 106 unchanged lines hidden --- | 193 BUG_ON(boot_func & BOOT_ADDR_CPUID_MASK); 194 BUG_ON(boot_func > (phys_addr_t)U32_MAX); 195 196 /* The core to start is encoded in the low bits */ 197 boot_val = (u32)boot_func | cpu_id; 198 writel_relaxed(boot_val, boot_reg); 199 200 sev(); --- 106 unchanged lines hidden --- |