platsmp.c (9938b04472d5c59f8bd8152a548533a8599596a2) | platsmp.c (64fc2a947a9873700929ec0ef02b4654a04e0476) |
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1/* 2 * linux/arch/arm/mach-axxia/platsmp.c 3 * 4 * Copyright (C) 2012 LSI Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 11 unchanged lines hidden (view full) --- 20#define SC_RST_CPU_HOLD 0x1010 21 22/* 23 * Write the kernel entry point for secondary CPUs to the specified address 24 */ 25static void write_release_addr(u32 release_phys) 26{ 27 u32 *virt = (u32 *) phys_to_virt(release_phys); | 1/* 2 * linux/arch/arm/mach-axxia/platsmp.c 3 * 4 * Copyright (C) 2012 LSI Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 11 unchanged lines hidden (view full) --- 20#define SC_RST_CPU_HOLD 0x1010 21 22/* 23 * Write the kernel entry point for secondary CPUs to the specified address 24 */ 25static void write_release_addr(u32 release_phys) 26{ 27 u32 *virt = (u32 *) phys_to_virt(release_phys); |
28 writel_relaxed(virt_to_phys(secondary_startup), virt); | 28 writel_relaxed(__pa_symbol(secondary_startup), virt); |
29 /* Make sure this store is visible to other CPUs */ 30 smp_wmb(); 31 __cpuc_flush_dcache_area(virt, sizeof(u32)); 32} 33 34static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle) 35{ 36 struct device_node *syscon_np; --- 53 unchanged lines hidden --- | 29 /* Make sure this store is visible to other CPUs */ 30 smp_wmb(); 31 __cpuc_flush_dcache_area(virt, sizeof(u32)); 32} 33 34static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle) 35{ 36 struct device_node *syscon_np; --- 53 unchanged lines hidden --- |